llvm-6502/test/Transforms/LoopSimplify/merge-exits.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

49 lines
1.6 KiB
LLVM

; RUN: opt < %s -loop-simplify -loop-rotate -instcombine -indvars -S -verify-loop-info -verify-dom-info | FileCheck %s
; Loopsimplify should be able to merge the two loop exits
; into one, so that loop rotate can rotate the loop, so
; that indvars can promote the induction variable to i64
; without needing casts.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
; CHECK-LABEL: @test1
; CHECK: bb:
; CHECK: phi i64
; CHECK-NOT: phi i64
; CHECK-NOT: sext
define float @test1(float* %pTmp1, float* %peakWeight, i32 %bandEdgeIndex) nounwind {
entry:
%t0 = load float, float* %peakWeight, align 4
br label %bb1
bb: ; preds = %bb2
%t1 = sext i32 %hiPart.0 to i64
%t2 = getelementptr float, float* %pTmp1, i64 %t1
%t3 = load float, float* %t2, align 4
%t4 = fadd float %t3, %distERBhi.0
%t5 = add i32 %hiPart.0, 1
%t6 = sext i32 %t5 to i64
%t7 = getelementptr float, float* %peakWeight, i64 %t6
%t8 = load float, float* %t7, align 4
%t9 = fadd float %t8, %peakCount.0
br label %bb1
bb1: ; preds = %bb, %entry
%peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ]
%hiPart.0 = phi i32 [ 0, %entry ], [ %t5, %bb ]
%distERBhi.0 = phi float [ 0.000000e+00, %entry ], [ %t4, %bb ]
%t10 = fcmp uge float %distERBhi.0, 2.500000e+00
br i1 %t10, label %bb3, label %bb2
bb2: ; preds = %bb1
%t11 = add i32 %bandEdgeIndex, -1
%t12 = icmp sgt i32 %t11, %hiPart.0
br i1 %t12, label %bb, label %bb3
bb3: ; preds = %bb2, %bb1
%t13 = fdiv float %peakCount.0, %distERBhi.0
ret float %t13
}