llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00

History

Tim Northover 9ed30bb230 ARM: use LLVM IR to represent the vshrn operation vshrn is just the combination of a right shift and a truncate (and the limits on the immediate value actually mean the signedness of the shift doesn't matter). Using that representation allows us to get rid of an ARM-specific intrinsic, share more code with AArch64 and hopefully get better code out of the mid-end optimisers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201085 91177308-0d34-0410-b5e6-96231b3b80d8	2014-02-10 14:04:07 +00:00
..
llvm	ARM: use LLVM IR to represent the vshrn operation	2014-02-10 14:04:07 +00:00
llvm-c	Fix known typos	2014-01-24 17:20:08 +00:00

Tim Northover 9ed30bb230 ARM: use LLVM IR to represent the vshrn operation

vshrn is just the combination of a right shift and a truncate (and the limits
on the immediate value actually mean the signedness of the shift doesn't
matter). Using that representation allows us to get rid of an ARM-specific
intrinsic, share more code with AArch64 and hopefully get better code out of
the mid-end optimisers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201085 91177308-0d34-0410-b5e6-96231b3b80d8

2014-02-10 14:04:07 +00:00

llvm

ARM: use LLVM IR to represent the vshrn operation

2014-02-10 14:04:07 +00:00

llvm-c

Fix known typos

2014-01-24 17:20:08 +00:00