mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-30 05:29:47 +00:00
c9ea25fc51
It handles the errors which were seen in PR19958 where wrong code was being emitted due to earlier patch. Added code for lshr as well as non-exact right shifts. It implements : (icmp eq/ne (ashr/lshr const2, A), const1)" -> (icmp eq/ne A, Log2(const2/const1)) -> (icmp eq/ne A, Log2(const2) - Log2(const1)) Differential Revision: http://reviews.llvm.org/D4068 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213678 91177308-0d34-0410-b5e6-96231b3b80d8
678 lines
15 KiB
LLVM
678 lines
15 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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; CHECK-LABEL: @exact_lshr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_eq_both_zero(i8 %a) {
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%shr = lshr exact i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_eq_both_zero(i8 %a) {
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%shr = ashr exact i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_eq_both_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_both_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_eq_both_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_ne_both_zero(i8 %a) {
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%shr = lshr exact i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_ne_both_zero(i8 %a) {
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%shr = ashr exact i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_ne_both_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_both_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_ne_both_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_last_zero(i8 %a) {
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%shr = lshr exact i8 128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_last_zero(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_last_zero(i8 %a) {
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%shr = lshr exact i8 128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_last_zero(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_lshr_eq_last_zero(i8 %a) {
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%shr = lshr i8 128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_last_zero
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; CHECK-NEXT: ret i1 false
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define i1 @nonexact_ashr_eq_last_zero(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_lshr_ne_last_zero(i8 %a) {
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%shr = lshr i8 128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_last_zero
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; CHECK-NEXT: ret i1 true
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define i1 @nonexact_ashr_ne_last_zero(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_msb_low_last_zero
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; CHECK-NEXT: icmp ugt i8 %a, 6
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define i1 @lshr_eq_msb_low_last_zero(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_msb_low_second_zero
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; CHECK-NEXT: icmp ugt i8 %a, 6
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define i1 @ashr_eq_msb_low_second_zero(i8 %a) {
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%shr = ashr i8 127, %a
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%cmp = icmp eq i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_msb_low_last_zero
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; CHECK-NEXT: icmp ult i8 %a, 7
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define i1 @lshr_ne_msb_low_last_zero(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_msb_low_second_zero
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; CHECK-NEXT: icmp ult i8 %a, 7
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define i1 @ashr_ne_msb_low_second_zero(i8 %a) {
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%shr = ashr i8 127, %a
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%cmp = icmp ne i8 %shr, 0
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_first_zero
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; CHECK-NEXT: ret i1 false
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define i1 @lshr_eq_first_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp eq i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_first_zero
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_eq_first_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp eq i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_first_zero
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; CHECK-NEXT: ret i1 true
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define i1 @lshr_ne_first_zero(i8 %a) {
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%shr = lshr i8 0, %a
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%cmp = icmp ne i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_first_zero
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_ne_first_zero(i8 %a) {
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%shr = ashr i8 0, %a
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%cmp = icmp ne i8 %shr, 2
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_both_minus1
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_eq_both_minus1(i8 %a) {
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%shr = ashr i8 -1, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_both_minus1
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_ne_both_minus1(i8 %a) {
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%shr = ashr i8 -1, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_minus1
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_eq_both_minus1(i8 %a) {
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%shr = ashr exact i8 -1, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_minus1
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_ne_both_minus1(i8 %a) {
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%shr = ashr exact i8 -1, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @ashr_eq_both_equal(i8 %a) {
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%shr = ashr i8 128, %a
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%cmp = icmp eq i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @ashr_ne_both_equal(i8 %a) {
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%shr = ashr i8 128, %a
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%cmp = icmp ne i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @lshr_eq_both_equal(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp eq i8 %shr, 127
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @lshr_ne_both_equal(i8 %a) {
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%shr = lshr i8 127, %a
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%cmp = icmp ne i8 %shr, 127
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @exact_ashr_eq_both_equal(i8 %a) {
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%shr = ashr exact i8 128, %a
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%cmp = icmp eq i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @exact_ashr_ne_both_equal(i8 %a) {
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%shr = ashr exact i8 128, %a
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%cmp = icmp ne i8 %shr, 128
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_both_equal
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; CHECK-NEXT: icmp eq i8 %a, 0
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define i1 @exact_lshr_eq_both_equal(i8 %a) {
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%shr = lshr exact i8 126, %a
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%cmp = icmp eq i8 %shr, 126
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_both_equal
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; CHECK-NEXT: icmp ne i8 %a, 0
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define i1 @exact_lshr_ne_both_equal(i8 %a) {
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%shr = lshr exact i8 126, %a
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%cmp = icmp ne i8 %shr, 126
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_opposite_msb
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; CHECK-NEXT: ret i1 false
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define i1 @exact_ashr_eq_opposite_msb(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_eq_opposite_msb
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; CHECK-NEXT: ret i1 false
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define i1 @ashr_eq_opposite_msb(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_opposite_msb
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @exact_lshr_eq_opposite_msb(i8 %a) {
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%shr = lshr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_eq_opposite_msb
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @lshr_eq_opposite_msb(i8 %a) {
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%shr = lshr i8 -128, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_opposite_msb
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; CHECK-NEXT: ret i1 true
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define i1 @exact_ashr_ne_opposite_msb(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @ashr_ne_opposite_msb
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; CHECK-NEXT: ret i1 true
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define i1 @ashr_ne_opposite_msb(i8 %a) {
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%shr = ashr i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_opposite_msb
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @exact_lshr_ne_opposite_msb(i8 %a) {
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%shr = lshr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @lshr_ne_opposite_msb
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @lshr_ne_opposite_msb(i8 %a) {
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%shr = lshr i8 -128, %a
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%cmp = icmp ne i8 %shr, 1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @exact_ashr_eq_shift_gt(i8 %a) {
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%shr = ashr exact i8 -2, %a
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%cmp = icmp eq i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @exact_ashr_ne_shift_gt(i8 %a) {
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%shr = ashr exact i8 -2, %a
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%cmp = icmp ne i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
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%shr = ashr i8 -2, %a
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%cmp = icmp eq i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
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%shr = ashr i8 -2, %a
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%cmp = icmp ne i8 %shr, -8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq_shift_gt
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; CHECK-NEXT: ret i1 false
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define i1 @exact_lshr_eq_shift_gt(i8 %a) {
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%shr = lshr exact i8 2, %a
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%cmp = icmp eq i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_ne_shift_gt
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; CHECK-NEXT: ret i1 true
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define i1 @exact_lshr_ne_shift_gt(i8 %a) {
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%shr = lshr exact i8 2, %a
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%cmp = icmp ne i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
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; CHECK-NEXT : ret i1 false
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define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
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%shr = lshr i8 2, %a
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%cmp = icmp eq i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
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; CHECK-NEXT : ret i1 true
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define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
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%shr = ashr i8 2, %a
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%cmp = icmp ne i8 %shr, 8
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_eq
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; CHECK-NEXT: icmp eq i8 %a, 7
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define i1 @exact_ashr_eq(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp eq i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_ashr_ne
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; CHECK-NEXT: icmp ne i8 %a, 7
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define i1 @exact_ashr_ne(i8 %a) {
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%shr = ashr exact i8 -128, %a
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%cmp = icmp ne i8 %shr, -1
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ret i1 %cmp
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}
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; CHECK-LABEL: @exact_lshr_eq
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; CHECK-NEXT: icmp eq i8 %a, 2
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define i1 @exact_lshr_eq(i8 %a) {
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%shr = lshr exact i8 4, %a
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%cmp = icmp eq i8 %shr, 1
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ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_ne
|
|
; CHECK-NEXT: icmp ne i8 %a, 2
|
|
define i1 @exact_lshr_ne(i8 %a) {
|
|
%shr = lshr exact i8 4, %a
|
|
%cmp = icmp ne i8 %shr, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq
|
|
; CHECK-NEXT: icmp eq i8 %a, 7
|
|
define i1 @nonexact_ashr_eq(i8 %a) {
|
|
%shr = ashr i8 -128, %a
|
|
%cmp = icmp eq i8 %shr, -1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne
|
|
; CHECK-NEXT: icmp ne i8 %a, 7
|
|
define i1 @nonexact_ashr_ne(i8 %a) {
|
|
%shr = ashr i8 -128, %a
|
|
%cmp = icmp ne i8 %shr, -1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq
|
|
; CHECK-NEXT: icmp eq i8 %a, 2
|
|
define i1 @nonexact_lshr_eq(i8 %a) {
|
|
%shr = lshr i8 4, %a
|
|
%cmp = icmp eq i8 %shr, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne
|
|
; CHECK-NEXT: icmp ne i8 %a, 2
|
|
define i1 @nonexact_lshr_ne(i8 %a) {
|
|
%shr = lshr i8 4, %a
|
|
%cmp = icmp ne i8 %shr, 1
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_eq_exactdiv
|
|
; CHECK-NEXT: icmp eq i8 %a, 4
|
|
define i1 @exact_lshr_eq_exactdiv(i8 %a) {
|
|
%shr = lshr exact i8 80, %a
|
|
%cmp = icmp eq i8 %shr, 5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_ne_exactdiv
|
|
; CHECK-NEXT: icmp ne i8 %a, 4
|
|
define i1 @exact_lshr_ne_exactdiv(i8 %a) {
|
|
%shr = lshr exact i8 80, %a
|
|
%cmp = icmp ne i8 %shr, 5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_exactdiv
|
|
; CHECK-NEXT: icmp eq i8 %a, 4
|
|
define i1 @nonexact_lshr_eq_exactdiv(i8 %a) {
|
|
%shr = lshr i8 80, %a
|
|
%cmp = icmp eq i8 %shr, 5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_exactdiv
|
|
; CHECK-NEXT: icmp ne i8 %a, 4
|
|
define i1 @nonexact_lshr_ne_exactdiv(i8 %a) {
|
|
%shr = lshr i8 80, %a
|
|
%cmp = icmp ne i8 %shr, 5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_eq_exactdiv
|
|
; CHECK-NEXT: icmp eq i8 %a, 4
|
|
define i1 @exact_ashr_eq_exactdiv(i8 %a) {
|
|
%shr = ashr exact i8 -80, %a
|
|
%cmp = icmp eq i8 %shr, -5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_ne_exactdiv
|
|
; CHECK-NEXT: icmp ne i8 %a, 4
|
|
define i1 @exact_ashr_ne_exactdiv(i8 %a) {
|
|
%shr = ashr exact i8 -80, %a
|
|
%cmp = icmp ne i8 %shr, -5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_exactdiv
|
|
; CHECK-NEXT: icmp eq i8 %a, 4
|
|
define i1 @nonexact_ashr_eq_exactdiv(i8 %a) {
|
|
%shr = ashr i8 -80, %a
|
|
%cmp = icmp eq i8 %shr, -5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_exactdiv
|
|
; CHECK-NEXT: icmp ne i8 %a, 4
|
|
define i1 @nonexact_ashr_ne_exactdiv(i8 %a) {
|
|
%shr = ashr i8 -80, %a
|
|
%cmp = icmp ne i8 %shr, -5
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_eq_noexactdiv
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @exact_lshr_eq_noexactdiv(i8 %a) {
|
|
%shr = lshr exact i8 80, %a
|
|
%cmp = icmp eq i8 %shr, 31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_ne_noexactdiv
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @exact_lshr_ne_noexactdiv(i8 %a) {
|
|
%shr = lshr exact i8 80, %a
|
|
%cmp = icmp ne i8 %shr, 31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_noexactdiv
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @nonexact_lshr_eq_noexactdiv(i8 %a) {
|
|
%shr = lshr i8 80, %a
|
|
%cmp = icmp eq i8 %shr, 31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_noexactdiv
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @nonexact_lshr_ne_noexactdiv(i8 %a) {
|
|
%shr = lshr i8 80, %a
|
|
%cmp = icmp ne i8 %shr, 31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_eq_noexactdiv
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @exact_ashr_eq_noexactdiv(i8 %a) {
|
|
%shr = ashr exact i8 -80, %a
|
|
%cmp = icmp eq i8 %shr, -31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_ne_noexactdiv
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @exact_ashr_ne_noexactdiv(i8 %a) {
|
|
%shr = ashr exact i8 -80, %a
|
|
%cmp = icmp ne i8 %shr, -31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_noexactdiv
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @nonexact_ashr_eq_noexactdiv(i8 %a) {
|
|
%shr = ashr i8 -80, %a
|
|
%cmp = icmp eq i8 %shr, -31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_noexactdiv
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @nonexact_ashr_ne_noexactdiv(i8 %a) {
|
|
%shr = ashr i8 -80, %a
|
|
%cmp = icmp ne i8 %shr, -31
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_eq_noexactlog
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @exact_lshr_eq_noexactlog(i8 %a) {
|
|
%shr = lshr exact i8 90, %a
|
|
%cmp = icmp eq i8 %shr, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_lshr_ne_noexactlog
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @exact_lshr_ne_noexactlog(i8 %a) {
|
|
%shr = lshr exact i8 90, %a
|
|
%cmp = icmp ne i8 %shr, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_eq_noexactlog
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @nonexact_lshr_eq_noexactlog(i8 %a) {
|
|
%shr = lshr i8 90, %a
|
|
%cmp = icmp eq i8 %shr, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_lshr_ne_noexactlog
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @nonexact_lshr_ne_noexactlog(i8 %a) {
|
|
%shr = lshr i8 90, %a
|
|
%cmp = icmp ne i8 %shr, 30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_eq_noexactlog
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @exact_ashr_eq_noexactlog(i8 %a) {
|
|
%shr = ashr exact i8 -90, %a
|
|
%cmp = icmp eq i8 %shr, -30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @exact_ashr_ne_noexactlog
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @exact_ashr_ne_noexactlog(i8 %a) {
|
|
%shr = ashr exact i8 -90, %a
|
|
%cmp = icmp ne i8 %shr, -30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_eq_noexactlog
|
|
; CHECK-NEXT: ret i1 false
|
|
define i1 @nonexact_ashr_eq_noexactlog(i8 %a) {
|
|
%shr = ashr i8 -90, %a
|
|
%cmp = icmp eq i8 %shr, -30
|
|
ret i1 %cmp
|
|
}
|
|
|
|
; CHECK-LABEL: @nonexact_ashr_ne_noexactlog
|
|
; CHECK-NEXT: ret i1 true
|
|
define i1 @nonexact_ashr_ne_noexactlog(i8 %a) {
|
|
%shr = ashr i8 -90, %a
|
|
%cmp = icmp ne i8 %shr, -30
|
|
ret i1 %cmp
|
|
}
|