llvm-6502/lib/Target/CellSPU
Chris Lattner 9f72d1a730 don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
DAGCombine is now quite good at zapifying them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47053 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-13 07:35:30 +00:00
..
CellSDKIntrinsics.td More CellSPU refinement and progress: 2008-01-11 02:53:15 +00:00
Makefile More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
README.txt More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPU.h More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPU.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUAsmPrinter.cpp Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
SPUCallingConv.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUFrameInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUFrameInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUHazardRecognizers.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUHazardRecognizers.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUInstrBuilder.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUInstrFormats.td Overhaul Cell SPU's addressing mode internals so that there are now 2008-01-29 02:16:57 +00:00
SPUInstrInfo.cpp It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 2008-02-08 21:20:40 +00:00
SPUInstrInfo.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
SPUInstrInfo.td More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPUISelDAGToDAG.cpp Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 2008-02-04 23:06:48 +00:00
SPUISelLowering.cpp don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS. 2008-02-13 07:35:30 +00:00
SPUISelLowering.h Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. 2008-02-13 00:35:47 +00:00
SPUMachineFunction.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUNodes.td More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPUOperands.td More CellSPU refinement and progress: 2008-01-11 02:53:15 +00:00
SPURegisterInfo.cpp Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
SPURegisterInfo.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00
SPURegisterInfo.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPURegisterNames.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUSchedule.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUSubtarget.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUSubtarget.h More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPUTargetAsmInfo.cpp Overhaul Cell SPU's addressing mode internals so that there are now 2008-01-29 02:16:57 +00:00
SPUTargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUTargetMachine.cpp More cleanups for CellSPU: 2008-01-30 02:55:46 +00:00
SPUTargetMachine.h Rename MRegisterInfo to TargetRegisterInfo. 2008-02-10 18:45:23 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE. 

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Finish branch instructions, branch prediction

  These instructions were started, but only insofar as to get llvm-gcc-4.2's
  crtbegin.ll working (which doesn't.)

* Double floating point support

  This was started. "What's missing?" to be filled in.

* Intrinsics

  Lots of progress. "What's missing/incomplete?" to be filled in.

===-------------------------------------------------------------------------===