llvm-6502/test/CodeGen/SystemZ/int-add-09.ll
Richard Sandiford 349baa6039 [SystemZ] Set usaAA to true
useAA significantly improves the handling of vector code that has TBAA
information attached.  It also helps other cases, as shown by the testsuite
changes here.  The only real downside I've seen is that it interferes with
MergeConsecutiveStores.  The problem is that that optimization works top
down, starting at the first store in the chain, and looks for cases where
the chain result is only used by a single related store.  These related
stores don't alias, so useAA will have rewritten all the later stores to
use a different chain input (typically the same one as the first store).

I think the advantages outweigh the disadvantages though, so for now I've
just disabled alias analysis for the unaligned-01.ll test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193521 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-28 13:53:37 +00:00

57 lines
1.3 KiB
LLVM

; Test 128-bit addition in which the second operand is constant.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Check additions of 1. The XOR ensures that we don't instead load the
; constant into a register and use memory addition.
define void @f1(i128 *%aptr) {
; CHECK-LABEL: f1:
; CHECK: algfi {{%r[0-5]}}, 1
; CHECK: alcg
; CHECK: br %r14
%a = load i128 *%aptr
%xor = xor i128 %a, 128
%add = add i128 %xor, 1
store i128 %add, i128 *%aptr
ret void
}
; Check the high end of the ALGFI range.
define void @f2(i128 *%aptr) {
; CHECK-LABEL: f2:
; CHECK: algfi {{%r[0-5]}}, 4294967295
; CHECK: alcg
; CHECK: br %r14
%a = load i128 *%aptr
%xor = xor i128 %a, 128
%add = add i128 %xor, 4294967295
store i128 %add, i128 *%aptr
ret void
}
; Check the next value up, which must use register addition.
define void @f3(i128 *%aptr) {
; CHECK-LABEL: f3:
; CHECK: algr
; CHECK: alcg
; CHECK: br %r14
%a = load i128 *%aptr
%xor = xor i128 %a, 128
%add = add i128 %xor, 4294967296
store i128 %add, i128 *%aptr
ret void
}
; Check addition of -1, which must also use register addition.
define void @f4(i128 *%aptr) {
; CHECK-LABEL: f4:
; CHECK: algr
; CHECK: alcg
; CHECK: br %r14
%a = load i128 *%aptr
%xor = xor i128 %a, 128
%add = add i128 %xor, -1
store i128 %add, i128 *%aptr
ret void
}