mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-23 16:30:00 +00:00
491a13691d
register classes. It provides information for each register class that cannot be determined statically, like: - The number of allocatable registers in a class after filtering out the reserved and invalid registers. - The preferred allocation order with registers that overlap callee-saved registers last. - The last callee-saved register that overlaps a given physical register. This information usually doesn't change between functions, so it is reused for compiling multiple functions when possible. The many possible combinations of reserved and callee saves registers makes it unfeasible to compute this information statically in TableGen. Use RegisterClassInfo to count available registers in various heuristics in SimpleRegisterCoalescing, making the pass run 4% faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132450 91177308-0d34-0410-b5e6-96231b3b80d8
102 lines
2.2 KiB
CMake
102 lines
2.2 KiB
CMake
add_llvm_library(LLVMCodeGen
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AggressiveAntiDepBreaker.cpp
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AllocationOrder.cpp
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Analysis.cpp
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BranchFolding.cpp
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CalcSpillWeights.cpp
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CallingConvLower.cpp
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CodeGen.cpp
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CodePlacementOpt.cpp
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CriticalAntiDepBreaker.cpp
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DeadMachineInstructionElim.cpp
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DwarfEHPrepare.cpp
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EdgeBundles.cpp
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ELFCodeEmitter.cpp
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ELFWriter.cpp
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ExpandISelPseudos.cpp
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GCMetadata.cpp
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GCMetadataPrinter.cpp
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GCStrategy.cpp
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IfConversion.cpp
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InlineSpiller.cpp
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InterferenceCache.cpp
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IntrinsicLowering.cpp
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LLVMTargetMachine.cpp
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LatencyPriorityQueue.cpp
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LiveDebugVariables.cpp
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LiveInterval.cpp
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LiveIntervalAnalysis.cpp
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LiveIntervalUnion.cpp
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LiveStackAnalysis.cpp
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LiveVariables.cpp
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LiveRangeEdit.cpp
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LocalStackSlotAllocation.cpp
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LowerSubregs.cpp
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MachineBasicBlock.cpp
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MachineCSE.cpp
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MachineDominators.cpp
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MachineFunction.cpp
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MachineFunctionAnalysis.cpp
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MachineFunctionPass.cpp
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MachineFunctionPrinterPass.cpp
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MachineInstr.cpp
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MachineLICM.cpp
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MachineLoopInfo.cpp
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MachineLoopRanges.cpp
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MachineModuleInfo.cpp
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MachineModuleInfoImpls.cpp
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MachinePassRegistry.cpp
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MachineRegisterInfo.cpp
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MachineSSAUpdater.cpp
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MachineSink.cpp
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MachineVerifier.cpp
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ObjectCodeEmitter.cpp
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OcamlGC.cpp
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OptimizePHIs.cpp
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PHIElimination.cpp
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PHIEliminationUtils.cpp
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Passes.cpp
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PeepholeOptimizer.cpp
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PostRASchedulerList.cpp
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PreAllocSplitting.cpp
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ProcessImplicitDefs.cpp
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PrologEpilogInserter.cpp
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PseudoSourceValue.cpp
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RegAllocBasic.cpp
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RegAllocFast.cpp
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RegAllocGreedy.cpp
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RegAllocLinearScan.cpp
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RegAllocPBQP.cpp
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RegisterClassInfo.cpp
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RegisterCoalescer.cpp
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RegisterScavenging.cpp
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RenderMachineFunction.cpp
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ScheduleDAG.cpp
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ScheduleDAGEmit.cpp
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ScheduleDAGInstrs.cpp
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ScheduleDAGPrinter.cpp
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ScoreboardHazardRecognizer.cpp
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ShadowStackGC.cpp
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ShrinkWrapping.cpp
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SimpleRegisterCoalescing.cpp
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SjLjEHPrepare.cpp
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SlotIndexes.cpp
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Spiller.cpp
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SpillPlacement.cpp
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SplitKit.cpp
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Splitter.cpp
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StackProtector.cpp
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StackSlotColoring.cpp
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StrongPHIElimination.cpp
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TailDuplication.cpp
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TargetInstrInfoImpl.cpp
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TargetLoweringObjectFileImpl.cpp
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TwoAddressInstructionPass.cpp
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UnreachableBlockElim.cpp
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VirtRegMap.cpp
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VirtRegRewriter.cpp
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)
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add_subdirectory(SelectionDAG)
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add_subdirectory(AsmPrinter)
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