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<h2>Section Example</h2> <div> <!-- h2+div is applied --> <p>Section preamble.</p> <h3>Subsection Example</h3> <p> <!-- h3+p is applied --> Subsection body </p> <!-- End of section body --> </div> FIXME: Care H5 better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130040 91177308-0d34-0410-b5e6-96231b3b80d8
919 lines
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HTML
919 lines
33 KiB
HTML
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN"
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"http://www.w3.org/TR/html4/strict.dtd">
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<html>
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<head>
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<title>TableGen Fundamentals</title>
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<link rel="stylesheet" href="llvm.css" type="text/css">
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</head>
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<body>
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<h1>TableGen Fundamentals</h1>
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<div>
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<ul>
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<li><a href="#introduction">Introduction</a>
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<ol>
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<li><a href="#concepts">Basic concepts</a></li>
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<li><a href="#example">An example record</a></li>
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<li><a href="#running">Running TableGen</a></li>
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</ol></li>
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<li><a href="#syntax">TableGen syntax</a>
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<ol>
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<li><a href="#primitives">TableGen primitives</a>
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<ol>
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<li><a href="#comments">TableGen comments</a></li>
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<li><a href="#types">The TableGen type system</a></li>
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<li><a href="#values">TableGen values and expressions</a></li>
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</ol></li>
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<li><a href="#classesdefs">Classes and definitions</a>
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<ol>
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<li><a href="#valuedef">Value definitions</a></li>
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<li><a href="#recordlet">'let' expressions</a></li>
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<li><a href="#templateargs">Class template arguments</a></li>
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<li><a href="#multiclass">Multiclass definitions and instances</a></li>
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</ol></li>
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<li><a href="#filescope">File scope entities</a>
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<ol>
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<li><a href="#include">File inclusion</a></li>
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<li><a href="#globallet">'let' expressions</a></li>
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</ol></li>
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</ol></li>
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<li><a href="#backends">TableGen backends</a>
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<ol>
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<li><a href="#">todo</a></li>
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</ol></li>
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</ul>
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</div>
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<div class="doc_author">
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<p>Written by <a href="mailto:sabre@nondot.org">Chris Lattner</a></p>
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</div>
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<!-- *********************************************************************** -->
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<h2><a name="introduction">Introduction</a></h2>
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<!-- *********************************************************************** -->
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<div>
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<p>TableGen's purpose is to help a human develop and maintain records of
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domain-specific information. Because there may be a large number of these
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records, it is specifically designed to allow writing flexible descriptions and
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for common features of these records to be factored out. This reduces the
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amount of duplication in the description, reduces the chance of error, and
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makes it easier to structure domain specific information.</p>
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<p>The core part of TableGen <a href="#syntax">parses a file</a>, instantiates
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the declarations, and hands the result off to a domain-specific "<a
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href="#backends">TableGen backend</a>" for processing. The current major user
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of TableGen is the <a href="CodeGenerator.html">LLVM code generator</a>.</p>
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<p>Note that if you work on TableGen much, and use emacs or vim, that you can
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find an emacs "TableGen mode" and a vim language file in the
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<tt>llvm/utils/emacs</tt> and <tt>llvm/utils/vim</tt> directories of your LLVM
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distribution, respectively.</p>
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<!-- ======================================================================= -->
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<h3><a name="concepts">Basic concepts</a></h3>
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<div>
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<p>TableGen files consist of two key parts: 'classes' and 'definitions', both
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of which are considered 'records'.</p>
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<p><b>TableGen records</b> have a unique name, a list of values, and a list of
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superclasses. The list of values is the main data that TableGen builds for each
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record; it is this that holds the domain specific information for the
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application. The interpretation of this data is left to a specific <a
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href="#backends">TableGen backend</a>, but the structure and format rules are
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taken care of and are fixed by TableGen.</p>
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<p><b>TableGen definitions</b> are the concrete form of 'records'. These
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generally do not have any undefined values, and are marked with the
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'<tt>def</tt>' keyword.</p>
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<p><b>TableGen classes</b> are abstract records that are used to build and
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describe other records. These 'classes' allow the end-user to build
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abstractions for either the domain they are targeting (such as "Register",
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"RegisterClass", and "Instruction" in the LLVM code generator) or for the
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implementor to help factor out common properties of records (such as "FPInst",
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which is used to represent floating point instructions in the X86 backend).
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TableGen keeps track of all of the classes that are used to build up a
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definition, so the backend can find all definitions of a particular class, such
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as "Instruction".</p>
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<p><b>TableGen multiclasses</b> are groups of abstract records that are
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instantiated all at once. Each instantiation can result in multiple
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TableGen definitions. If a multiclass inherits from another multiclass,
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the definitions in the sub-multiclass become part of the current
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multiclass, as if they were declared in the current multiclass.</p>
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</div>
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<!-- ======================================================================= -->
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<h3><a name="example">An example record</a></h3>
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<div>
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<p>With no other arguments, TableGen parses the specified file and prints out
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all of the classes, then all of the definitions. This is a good way to see what
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the various definitions expand to fully. Running this on the <tt>X86.td</tt>
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file prints this (at the time of this writing):</p>
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<div class="doc_code">
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<pre>
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...
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<b>def</b> ADD32rr { <i>// Instruction X86Inst I</i>
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<b>string</b> Namespace = "X86";
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<b>dag</b> OutOperandList = (outs GR32:$dst);
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<b>dag</b> InOperandList = (ins GR32:$src1, GR32:$src2);
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<b>string</b> AsmString = "add{l}\t{$src2, $dst|$dst, $src2}";
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<b>list</b><dag> Pattern = [(set GR32:$dst, (add GR32:$src1, GR32:$src2))];
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<b>list</b><Register> Uses = [];
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<b>list</b><Register> Defs = [EFLAGS];
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<b>list</b><Predicate> Predicates = [];
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<b>int</b> CodeSize = 3;
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<b>int</b> AddedComplexity = 0;
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<b>bit</b> isReturn = 0;
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<b>bit</b> isBranch = 0;
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<b>bit</b> isIndirectBranch = 0;
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<b>bit</b> isBarrier = 0;
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<b>bit</b> isCall = 0;
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<b>bit</b> canFoldAsLoad = 0;
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<b>bit</b> mayLoad = 0;
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<b>bit</b> mayStore = 0;
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<b>bit</b> isImplicitDef = 0;
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<b>bit</b> isConvertibleToThreeAddress = 1;
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<b>bit</b> isCommutable = 1;
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<b>bit</b> isTerminator = 0;
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<b>bit</b> isReMaterializable = 0;
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<b>bit</b> isPredicable = 0;
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<b>bit</b> hasDelaySlot = 0;
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<b>bit</b> usesCustomInserter = 0;
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<b>bit</b> hasCtrlDep = 0;
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<b>bit</b> isNotDuplicable = 0;
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<b>bit</b> hasSideEffects = 0;
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<b>bit</b> neverHasSideEffects = 0;
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InstrItinClass Itinerary = NoItinerary;
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<b>string</b> Constraints = "";
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<b>string</b> DisableEncoding = "";
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<b>bits</b><8> Opcode = { 0, 0, 0, 0, 0, 0, 0, 1 };
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Format Form = MRMDestReg;
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<b>bits</b><6> FormBits = { 0, 0, 0, 0, 1, 1 };
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ImmType ImmT = NoImm;
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<b>bits</b><3> ImmTypeBits = { 0, 0, 0 };
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<b>bit</b> hasOpSizePrefix = 0;
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<b>bit</b> hasAdSizePrefix = 0;
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<b>bits</b><4> Prefix = { 0, 0, 0, 0 };
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<b>bit</b> hasREX_WPrefix = 0;
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FPFormat FPForm = ?;
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<b>bits</b><3> FPFormBits = { 0, 0, 0 };
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}
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...
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</pre>
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</div>
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<p>This definition corresponds to a 32-bit register-register add instruction in
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the X86. The string after the '<tt>def</tt>' string indicates the name of the
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record—"<tt>ADD32rr</tt>" in this case—and the comment at the end of
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the line indicates the superclasses of the definition. The body of the record
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contains all of the data that TableGen assembled for the record, indicating that
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the instruction is part of the "X86" namespace, the pattern indicating how the
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the instruction should be emitted into the assembly file, that it is a
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two-address instruction, has a particular encoding, etc. The contents and
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semantics of the information in the record is specific to the needs of the X86
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backend, and is only shown as an example.</p>
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<p>As you can see, a lot of information is needed for every instruction
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supported by the code generator, and specifying it all manually would be
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unmaintainable, prone to bugs, and tiring to do in the first place. Because we
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are using TableGen, all of the information was derived from the following
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definition:</p>
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<div class="doc_code">
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<pre>
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let Defs = [EFLAGS],
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isCommutable = 1, <i>// X = ADD Y,Z --> X = ADD Z,Y</i>
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isConvertibleToThreeAddress = 1 <b>in</b> <i>// Can transform into LEA.</i>
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def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst),
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(ins GR32:$src1, GR32:$src2),
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"add{l}\t{$src2, $dst|$dst, $src2}",
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[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
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</pre>
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</div>
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<p>This definition makes use of the custom class <tt>I</tt> (extended from the
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custom class <tt>X86Inst</tt>), which is defined in the X86-specific TableGen
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file, to factor out the common features that instructions of its class share. A
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key feature of TableGen is that it allows the end-user to define the
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abstractions they prefer to use when describing their information.</p>
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</div>
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<!-- ======================================================================= -->
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<h3><a name="running">Running TableGen</a></h3>
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<div>
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<p>TableGen runs just like any other LLVM tool. The first (optional) argument
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specifies the file to read. If a filename is not specified, <tt>tblgen</tt>
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reads from standard input.</p>
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<p>To be useful, one of the <a href="#backends">TableGen backends</a> must be
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used. These backends are selectable on the command line (type '<tt>tblgen
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-help</tt>' for a list). For example, to get a list of all of the definitions
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that subclass a particular type (which can be useful for building up an enum
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list of these records), use the <tt>-print-enums</tt> option:</p>
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<div class="doc_code">
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<pre>
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$ tblgen X86.td -print-enums -class=Register
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AH, AL, AX, BH, BL, BP, BPL, BX, CH, CL, CX, DH, DI, DIL, DL, DX, EAX, EBP, EBX,
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ECX, EDI, EDX, EFLAGS, EIP, ESI, ESP, FP0, FP1, FP2, FP3, FP4, FP5, FP6, IP,
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MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
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R11W, R12, R12B, R12D, R12W, R13, R13B, R13D, R13W, R14, R14B, R14D, R14W, R15,
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R15B, R15D, R15W, R8, R8B, R8D, R8W, R9, R9B, R9D, R9W, RAX, RBP, RBX, RCX, RDI,
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RDX, RIP, RSI, RSP, SI, SIL, SP, SPL, ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
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XMM0, XMM1, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5,
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XMM6, XMM7, XMM8, XMM9,
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$ tblgen X86.td -print-enums -class=Instruction
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ABS_F, ABS_Fp32, ABS_Fp64, ABS_Fp80, ADC32mi, ADC32mi8, ADC32mr, ADC32ri,
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ADC32ri8, ADC32rm, ADC32rr, ADC64mi32, ADC64mi8, ADC64mr, ADC64ri32, ADC64ri8,
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ADC64rm, ADC64rr, ADD16mi, ADD16mi8, ADD16mr, ADD16ri, ADD16ri8, ADD16rm,
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ADD16rr, ADD32mi, ADD32mi8, ADD32mr, ADD32ri, ADD32ri8, ADD32rm, ADD32rr,
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ADD64mi32, ADD64mi8, ADD64mr, ADD64ri32, ...
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</pre>
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</div>
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<p>The default backend prints out all of the records, as described <a
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href="#example">above</a>.</p>
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<p>If you plan to use TableGen, you will most likely have to <a
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href="#backends">write a backend</a> that extracts the information specific to
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what you need and formats it in the appropriate way.</p>
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</div>
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</div>
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<!-- *********************************************************************** -->
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<h2><a name="syntax">TableGen syntax</a></h2>
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<!-- *********************************************************************** -->
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<div>
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<p>TableGen doesn't care about the meaning of data (that is up to the backend to
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define), but it does care about syntax, and it enforces a simple type system.
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This section describes the syntax and the constructs allowed in a TableGen file.
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</p>
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<!-- ======================================================================= -->
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<h3><a name="primitives">TableGen primitives</a></h3>
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<div>
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<!-- -------------------------------------------------------------------------->
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<h4><a name="comments">TableGen comments</a></h4>
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<div>
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<p>TableGen supports BCPL style "<tt>//</tt>" comments, which run to the end of
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the line, and it also supports <b>nestable</b> "<tt>/* */</tt>" comments.</p>
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</div>
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<!-- -------------------------------------------------------------------------->
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<h4>
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<a name="types">The TableGen type system</a>
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</h4>
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<div>
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<p>TableGen files are strongly typed, in a simple (but complete) type-system.
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These types are used to perform automatic conversions, check for errors, and to
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help interface designers constrain the input that they allow. Every <a
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href="#valuedef">value definition</a> is required to have an associated type.
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</p>
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<p>TableGen supports a mixture of very low-level types (such as <tt>bit</tt>)
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and very high-level types (such as <tt>dag</tt>). This flexibility is what
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allows it to describe a wide range of information conveniently and compactly.
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The TableGen types are:</p>
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<dl>
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<dt><tt><b>bit</b></tt></dt>
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<dd>A 'bit' is a boolean value that can hold either 0 or 1.</dd>
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<dt><tt><b>int</b></tt></dt>
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<dd>The 'int' type represents a simple 32-bit integer value, such as 5.</dd>
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<dt><tt><b>string</b></tt></dt>
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<dd>The 'string' type represents an ordered sequence of characters of
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arbitrary length.</dd>
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<dt><tt><b>bits</b><n></tt></dt>
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<dd>A 'bits' type is an arbitrary, but fixed, size integer that is broken up
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into individual bits. This type is useful because it can handle some bits
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being defined while others are undefined.</dd>
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<dt><tt><b>list</b><ty></tt></dt>
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<dd>This type represents a list whose elements are some other type. The
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contained type is arbitrary: it can even be another list type.</dd>
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<dt>Class type</dt>
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<dd>Specifying a class name in a type context means that the defined value
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must be a subclass of the specified class. This is useful in conjunction with
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the <b><tt>list</tt></b> type, for example, to constrain the elements of the
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list to a common base class (e.g., a <tt><b>list</b><Register></tt> can
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only contain definitions derived from the "<tt>Register</tt>" class).</dd>
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<dt><tt><b>dag</b></tt></dt>
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<dd>This type represents a nestable directed graph of elements.</dd>
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<dt><tt><b>code</b></tt></dt>
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<dd>This represents a big hunk of text. This is lexically distinct from
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string values because it doesn't require escapeing double quotes and other
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common characters that occur in code.</dd>
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</dl>
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<p>To date, these types have been sufficient for describing things that
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TableGen has been used for, but it is straight-forward to extend this list if
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needed.</p>
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</div>
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<!-- -------------------------------------------------------------------------->
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<h4>
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<a name="values">TableGen values and expressions</a>
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</h4>
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<div>
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<p>TableGen allows for a pretty reasonable number of different expression forms
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when building up values. These forms allow the TableGen file to be written in a
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natural syntax and flavor for the application. The current expression forms
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supported include:</p>
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<dl>
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<dt><tt>?</tt></dt>
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<dd>uninitialized field</dd>
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<dt><tt>0b1001011</tt></dt>
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<dd>binary integer value</dd>
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<dt><tt>07654321</tt></dt>
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<dd>octal integer value (indicated by a leading 0)</dd>
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<dt><tt>7</tt></dt>
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<dd>decimal integer value</dd>
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<dt><tt>0x7F</tt></dt>
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<dd>hexadecimal integer value</dd>
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<dt><tt>"foo"</tt></dt>
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<dd>string value</dd>
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<dt><tt>[{ ... }]</tt></dt>
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<dd>code fragment</dd>
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<dt><tt>[ X, Y, Z ]<type></tt></dt>
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<dd>list value. <type> is the type of the list
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element and is usually optional. In rare cases,
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TableGen is unable to deduce the element type in
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which case the user must specify it explicitly.</dd>
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<dt><tt>{ a, b, c }</tt></dt>
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<dd>initializer for a "bits<3>" value</dd>
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<dt><tt>value</tt></dt>
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<dd>value reference</dd>
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<dt><tt>value{17}</tt></dt>
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<dd>access to one bit of a value</dd>
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<dt><tt>value{15-17}</tt></dt>
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<dd>access to multiple bits of a value</dd>
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<dt><tt>DEF</tt></dt>
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<dd>reference to a record definition</dd>
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<dt><tt>CLASS<val list></tt></dt>
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<dd>reference to a new anonymous definition of CLASS with the specified
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template arguments.</dd>
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<dt><tt>X.Y</tt></dt>
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<dd>reference to the subfield of a value</dd>
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<dt><tt>list[4-7,17,2-3]</tt></dt>
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<dd>A slice of the 'list' list, including elements 4,5,6,7,17,2, and 3 from
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it. Elements may be included multiple times.</dd>
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<dt><tt>(DEF a, b)</tt></dt>
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<dd>a dag value. The first element is required to be a record definition, the
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remaining elements in the list may be arbitrary other values, including nested
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`<tt>dag</tt>' values.</dd>
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<dt><tt>!strconcat(a, b)</tt></dt>
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<dd>A string value that is the result of concatenating the 'a' and 'b'
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strings.</dd>
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<dt><tt>!cast<type>(a)</tt></dt>
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<dd>A symbol of type <em>type</em> obtained by looking up the string 'a' in
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the symbol table. If the type of 'a' does not match <em>type</em>, TableGen
|
|
aborts with an error. !cast<string> is a special case in that the argument must
|
|
be an object defined by a 'def' construct.</dd>
|
|
<dt><tt>!subst(a, b, c)</tt></dt>
|
|
<dd>If 'a' and 'b' are of string type or are symbol references, substitute
|
|
'b' for 'a' in 'c.' This operation is analogous to $(subst) in GNU make.</dd>
|
|
<dt><tt>!foreach(a, b, c)</tt></dt>
|
|
<dd>For each member 'b' of dag or list 'a' apply operator 'c.' 'b' is a
|
|
dummy variable that should be declared as a member variable of an instantiated
|
|
class. This operation is analogous to $(foreach) in GNU make.</dd>
|
|
<dt><tt>!head(a)</tt></dt>
|
|
<dd>The first element of list 'a.'</dd>
|
|
<dt><tt>!tail(a)</tt></dt>
|
|
<dd>The 2nd-N elements of list 'a.'</dd>
|
|
<dt><tt>!empty(a)</tt></dt>
|
|
<dd>An integer {0,1} indicating whether list 'a' is empty.</dd>
|
|
<dt><tt>!if(a,b,c)</tt></dt>
|
|
<dd>'b' if the result of 'int' or 'bit' operator 'a' is nonzero,
|
|
'c' otherwise.</dd>
|
|
<dt><tt>!eq(a,b)</tt></dt>
|
|
<dd>'bit 1' if string a is equal to string b, 0 otherwise. This
|
|
only operates on string, int and bit objects. Use !cast<string> to
|
|
compare other types of objects.</dd>
|
|
</dl>
|
|
|
|
<p>Note that all of the values have rules specifying how they convert to values
|
|
for different types. These rules allow you to assign a value like "<tt>7</tt>"
|
|
to a "<tt>bits<4></tt>" value, for example.</p>
|
|
|
|
</div>
|
|
|
|
</div>
|
|
|
|
<!-- ======================================================================= -->
|
|
<h3>
|
|
<a name="classesdefs">Classes and definitions</a>
|
|
</h3>
|
|
|
|
<div>
|
|
|
|
<p>As mentioned in the <a href="#concepts">intro</a>, classes and definitions
|
|
(collectively known as 'records') in TableGen are the main high-level unit of
|
|
information that TableGen collects. Records are defined with a <tt>def</tt> or
|
|
<tt>class</tt> keyword, the record name, and an optional list of "<a
|
|
href="#templateargs">template arguments</a>". If the record has superclasses,
|
|
they are specified as a comma separated list that starts with a colon character
|
|
("<tt>:</tt>"). If <a href="#valuedef">value definitions</a> or <a
|
|
href="#recordlet">let expressions</a> are needed for the class, they are
|
|
enclosed in curly braces ("<tt>{}</tt>"); otherwise, the record ends with a
|
|
semicolon.</p>
|
|
|
|
<p>Here is a simple TableGen file:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> C { <b>bit</b> V = 1; }
|
|
<b>def</b> X : C;
|
|
<b>def</b> Y : C {
|
|
<b>string</b> Greeting = "hello";
|
|
}
|
|
</pre>
|
|
</div>
|
|
|
|
<p>This example defines two definitions, <tt>X</tt> and <tt>Y</tt>, both of
|
|
which derive from the <tt>C</tt> class. Because of this, they both get the
|
|
<tt>V</tt> bit value. The <tt>Y</tt> definition also gets the Greeting member
|
|
as well.</p>
|
|
|
|
<p>In general, classes are useful for collecting together the commonality
|
|
between a group of records and isolating it in a single place. Also, classes
|
|
permit the specification of default values for their subclasses, allowing the
|
|
subclasses to override them as they wish.</p>
|
|
|
|
<!---------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="valuedef">Value definitions</a>
|
|
</h4>
|
|
|
|
<div>
|
|
|
|
<p>Value definitions define named entries in records. A value must be defined
|
|
before it can be referred to as the operand for another value definition or
|
|
before the value is reset with a <a href="#recordlet">let expression</a>. A
|
|
value is defined by specifying a <a href="#types">TableGen type</a> and a name.
|
|
If an initial value is available, it may be specified after the type with an
|
|
equal sign. Value definitions require terminating semicolons.</p>
|
|
|
|
</div>
|
|
|
|
<!-- -------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="recordlet">'let' expressions</a>
|
|
</h4>
|
|
|
|
<div>
|
|
|
|
<p>A record-level let expression is used to change the value of a value
|
|
definition in a record. This is primarily useful when a superclass defines a
|
|
value that a derived class or definition wants to override. Let expressions
|
|
consist of the '<tt>let</tt>' keyword followed by a value name, an equal sign
|
|
("<tt>=</tt>"), and a new value. For example, a new class could be added to the
|
|
example above, redefining the <tt>V</tt> field for all of its subclasses:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> D : C { let V = 0; }
|
|
<b>def</b> Z : D;
|
|
</pre>
|
|
</div>
|
|
|
|
<p>In this case, the <tt>Z</tt> definition will have a zero value for its "V"
|
|
value, despite the fact that it derives (indirectly) from the <tt>C</tt> class,
|
|
because the <tt>D</tt> class overrode its value.</p>
|
|
|
|
</div>
|
|
|
|
<!-- -------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="templateargs">Class template arguments</a>
|
|
</h4>
|
|
|
|
<div>
|
|
|
|
<p>TableGen permits the definition of parameterized classes as well as normal
|
|
concrete classes. Parameterized TableGen classes specify a list of variable
|
|
bindings (which may optionally have defaults) that are bound when used. Here is
|
|
a simple example:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> FPFormat<<b>bits</b><3> val> {
|
|
<b>bits</b><3> Value = val;
|
|
}
|
|
<b>def</b> NotFP : FPFormat<0>;
|
|
<b>def</b> ZeroArgFP : FPFormat<1>;
|
|
<b>def</b> OneArgFP : FPFormat<2>;
|
|
<b>def</b> OneArgFPRW : FPFormat<3>;
|
|
<b>def</b> TwoArgFP : FPFormat<4>;
|
|
<b>def</b> CompareFP : FPFormat<5>;
|
|
<b>def</b> CondMovFP : FPFormat<6>;
|
|
<b>def</b> SpecialFP : FPFormat<7>;
|
|
</pre>
|
|
</div>
|
|
|
|
<p>In this case, template arguments are used as a space efficient way to specify
|
|
a list of "enumeration values", each with a "<tt>Value</tt>" field set to the
|
|
specified integer.</p>
|
|
|
|
<p>The more esoteric forms of <a href="#values">TableGen expressions</a> are
|
|
useful in conjunction with template arguments. As an example:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> ModRefVal<<b>bits</b><2> val> {
|
|
<b>bits</b><2> Value = val;
|
|
}
|
|
|
|
<b>def</b> None : ModRefVal<0>;
|
|
<b>def</b> Mod : ModRefVal<1>;
|
|
<b>def</b> Ref : ModRefVal<2>;
|
|
<b>def</b> ModRef : ModRefVal<3>;
|
|
|
|
<b>class</b> Value<ModRefVal MR> {
|
|
<i>// Decode some information into a more convenient format, while providing
|
|
// a nice interface to the user of the "Value" class.</i>
|
|
<b>bit</b> isMod = MR.Value{0};
|
|
<b>bit</b> isRef = MR.Value{1};
|
|
|
|
<i>// other stuff...</i>
|
|
}
|
|
|
|
<i>// Example uses</i>
|
|
<b>def</b> bork : Value<Mod>;
|
|
<b>def</b> zork : Value<Ref>;
|
|
<b>def</b> hork : Value<ModRef>;
|
|
</pre>
|
|
</div>
|
|
|
|
<p>This is obviously a contrived example, but it shows how template arguments
|
|
can be used to decouple the interface provided to the user of the class from the
|
|
actual internal data representation expected by the class. In this case,
|
|
running <tt>tblgen</tt> on the example prints the following definitions:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>def</b> bork { <i>// Value</i>
|
|
<b>bit</b> isMod = 1;
|
|
<b>bit</b> isRef = 0;
|
|
}
|
|
<b>def</b> hork { <i>// Value</i>
|
|
<b>bit</b> isMod = 1;
|
|
<b>bit</b> isRef = 1;
|
|
}
|
|
<b>def</b> zork { <i>// Value</i>
|
|
<b>bit</b> isMod = 0;
|
|
<b>bit</b> isRef = 1;
|
|
}
|
|
</pre>
|
|
</div>
|
|
|
|
<p> This shows that TableGen was able to dig into the argument and extract a
|
|
piece of information that was requested by the designer of the "Value" class.
|
|
For more realistic examples, please see existing users of TableGen, such as the
|
|
X86 backend.</p>
|
|
|
|
</div>
|
|
|
|
<!-- -------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="multiclass">Multiclass definitions and instances</a>
|
|
</h4>
|
|
|
|
<div>
|
|
|
|
<p>
|
|
While classes with template arguments are a good way to factor commonality
|
|
between two instances of a definition, multiclasses allow a convenient notation
|
|
for defining multiple definitions at once (instances of implicitly constructed
|
|
classes). For example, consider an 3-address instruction set whose instructions
|
|
come in two forms: "<tt>reg = reg op reg</tt>" and "<tt>reg = reg op imm</tt>"
|
|
(e.g. SPARC). In this case, you'd like to specify in one place that this
|
|
commonality exists, then in a separate place indicate what all the ops are.
|
|
</p>
|
|
|
|
<p>
|
|
Here is an example TableGen fragment that shows this idea:
|
|
</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>def</b> ops;
|
|
<b>def</b> GPR;
|
|
<b>def</b> Imm;
|
|
<b>class</b> inst<<b>int</b> opc, <b>string</b> asmstr, <b>dag</b> operandlist>;
|
|
|
|
<b>multiclass</b> ri_inst<<b>int</b> opc, <b>string</b> asmstr> {
|
|
def _rr : inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
|
(ops GPR:$dst, GPR:$src1, GPR:$src2)>;
|
|
def _ri : inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
|
(ops GPR:$dst, GPR:$src1, Imm:$src2)>;
|
|
}
|
|
|
|
<i>// Instantiations of the ri_inst multiclass.</i>
|
|
<b>defm</b> ADD : ri_inst<0b111, "add">;
|
|
<b>defm</b> SUB : ri_inst<0b101, "sub">;
|
|
<b>defm</b> MUL : ri_inst<0b100, "mul">;
|
|
...
|
|
</pre>
|
|
</div>
|
|
|
|
<p>The name of the resultant definitions has the multidef fragment names
|
|
appended to them, so this defines <tt>ADD_rr</tt>, <tt>ADD_ri</tt>,
|
|
<tt>SUB_rr</tt>, etc. A defm may inherit from multiple multiclasses,
|
|
instantiating definitions from each multiclass. Using a multiclass
|
|
this way is exactly equivalent to instantiating the classes multiple
|
|
times yourself, e.g. by writing:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>def</b> ops;
|
|
<b>def</b> GPR;
|
|
<b>def</b> Imm;
|
|
<b>class</b> inst<<b>int</b> opc, <b>string</b> asmstr, <b>dag</b> operandlist>;
|
|
|
|
<b>class</b> rrinst<<b>int</b> opc, <b>string</b> asmstr>
|
|
: inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
|
(ops GPR:$dst, GPR:$src1, GPR:$src2)>;
|
|
|
|
<b>class</b> riinst<<b>int</b> opc, <b>string</b> asmstr>
|
|
: inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
|
(ops GPR:$dst, GPR:$src1, Imm:$src2)>;
|
|
|
|
<i>// Instantiations of the ri_inst multiclass.</i>
|
|
<b>def</b> ADD_rr : rrinst<0b111, "add">;
|
|
<b>def</b> ADD_ri : riinst<0b111, "add">;
|
|
<b>def</b> SUB_rr : rrinst<0b101, "sub">;
|
|
<b>def</b> SUB_ri : riinst<0b101, "sub">;
|
|
<b>def</b> MUL_rr : rrinst<0b100, "mul">;
|
|
<b>def</b> MUL_ri : riinst<0b100, "mul">;
|
|
...
|
|
</pre>
|
|
</div>
|
|
|
|
<p>
|
|
A defm can also be used inside a multiclass providing several levels of
|
|
multiclass instanciations.
|
|
</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> Instruction<bits<4> opc, string Name> {
|
|
bits<4> opcode = opc;
|
|
string name = Name;
|
|
}
|
|
|
|
<b>multiclass</b> basic_r<bits<4> opc> {
|
|
<b>def</b> rr : Instruction<opc, "rr">;
|
|
<b>def</b> rm : Instruction<opc, "rm">;
|
|
}
|
|
|
|
<b>multiclass</b> basic_s<bits<4> opc> {
|
|
<b>defm</b> SS : basic_r<opc>;
|
|
<b>defm</b> SD : basic_r<opc>;
|
|
<b>def</b> X : Instruction<opc, "x">;
|
|
}
|
|
|
|
<b>multiclass</b> basic_p<bits<4> opc> {
|
|
<b>defm</b> PS : basic_r<opc>;
|
|
<b>defm</b> PD : basic_r<opc>;
|
|
<b>def</b> Y : Instruction<opc, "y">;
|
|
}
|
|
|
|
<b>defm</b> ADD : basic_s<0xf>, basic_p<0xf>;
|
|
...
|
|
|
|
<i>// Results</i>
|
|
<b>def</b> ADDPDrm { ...
|
|
<b>def</b> ADDPDrr { ...
|
|
<b>def</b> ADDPSrm { ...
|
|
<b>def</b> ADDPSrr { ...
|
|
<b>def</b> ADDSDrm { ...
|
|
<b>def</b> ADDSDrr { ...
|
|
<b>def</b> ADDY { ...
|
|
<b>def</b> ADDX { ...
|
|
</pre>
|
|
</div>
|
|
|
|
<p>
|
|
defm declarations can inherit from classes too, the
|
|
rule to follow is that the class list must start after the
|
|
last multiclass, and there must be at least one multiclass
|
|
before them.
|
|
</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>class</b> XD { bits<4> Prefix = 11; }
|
|
<b>class</b> XS { bits<4> Prefix = 12; }
|
|
|
|
<b>class</b> I<bits<4> op> {
|
|
bits<4> opcode = op;
|
|
}
|
|
|
|
<b>multiclass</b> R {
|
|
<b>def</b> rr : I<4>;
|
|
<b>def</b> rm : I<2>;
|
|
}
|
|
|
|
<b>multiclass</b> Y {
|
|
<b>defm</b> SS : R, XD;
|
|
<b>defm</b> SD : R, XS;
|
|
}
|
|
|
|
<b>defm</b> Instr : Y;
|
|
|
|
<i>// Results</i>
|
|
<b>def</b> InstrSDrm {
|
|
bits<4> opcode = { 0, 0, 1, 0 };
|
|
bits<4> Prefix = { 1, 1, 0, 0 };
|
|
}
|
|
...
|
|
<b>def</b> InstrSSrr {
|
|
bits<4> opcode = { 0, 1, 0, 0 };
|
|
bits<4> Prefix = { 1, 0, 1, 1 };
|
|
}
|
|
</pre>
|
|
</div>
|
|
|
|
</div>
|
|
|
|
</div>
|
|
|
|
<!-- ======================================================================= -->
|
|
<h3>
|
|
<a name="filescope">File scope entities</a>
|
|
</h3>
|
|
|
|
<div>
|
|
|
|
<!-- -------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="include">File inclusion</a>
|
|
</h4>
|
|
|
|
<div>
|
|
<p>TableGen supports the '<tt>include</tt>' token, which textually substitutes
|
|
the specified file in place of the include directive. The filename should be
|
|
specified as a double quoted string immediately after the '<tt>include</tt>'
|
|
keyword. Example:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>include</b> "foo.td"
|
|
</pre>
|
|
</div>
|
|
|
|
</div>
|
|
|
|
<!-- -------------------------------------------------------------------------->
|
|
<h4>
|
|
<a name="globallet">'let' expressions</a>
|
|
</h4>
|
|
|
|
<div>
|
|
|
|
<p>"Let" expressions at file scope are similar to <a href="#recordlet">"let"
|
|
expressions within a record</a>, except they can specify a value binding for
|
|
multiple records at a time, and may be useful in certain other cases.
|
|
File-scope let expressions are really just another way that TableGen allows the
|
|
end-user to factor out commonality from the records.</p>
|
|
|
|
<p>File-scope "let" expressions take a comma-separated list of bindings to
|
|
apply, and one or more records to bind the values in. Here are some
|
|
examples:</p>
|
|
|
|
<div class="doc_code">
|
|
<pre>
|
|
<b>let</b> isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 <b>in</b>
|
|
<b>def</b> RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>;
|
|
|
|
<b>let</b> isCall = 1 <b>in</b>
|
|
<i>// All calls clobber the non-callee saved registers...</i>
|
|
<b>let</b> Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
|
|
MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
|
XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] <b>in</b> {
|
|
<b>def</b> CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
|
|
"call\t${dst:call}", []>;
|
|
<b>def</b> CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
|
|
"call\t{*}$dst", [(X86call GR32:$dst)]>;
|
|
<b>def</b> CALL32m : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
|
|
"call\t{*}$dst", []>;
|
|
}
|
|
</pre>
|
|
</div>
|
|
|
|
<p>File-scope "let" expressions are often useful when a couple of definitions
|
|
need to be added to several records, and the records do not otherwise need to be
|
|
opened, as in the case with the <tt>CALL*</tt> instructions above.</p>
|
|
|
|
<p>It's also possible to use "let" expressions inside multiclasses, providing
|
|
more ways to factor out commonality from the records, specially if using
|
|
several levels of multiclass instanciations. This also avoids the need of using
|
|
"let" expressions within subsequent records inside a multiclass.</p>
|
|
|
|
<pre class="doc_code">
|
|
<b>multiclass </b>basic_r<bits<4> opc> {
|
|
<b>let </b>Predicates = [HasSSE2] in {
|
|
<b>def </b>rr : Instruction<opc, "rr">;
|
|
<b>def </b>rm : Instruction<opc, "rm">;
|
|
}
|
|
<b>let </b>Predicates = [HasSSE3] in
|
|
<b>def </b>rx : Instruction<opc, "rx">;
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}
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<b>multiclass </b>basic_ss<bits<4> opc> {
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<b>let </b>IsDouble = 0 in
|
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<b>defm </b>SS : basic_r<opc>;
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|
|
|
<b>let </b>IsDouble = 1 in
|
|
<b>defm </b>SD : basic_r<opc>;
|
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}
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|
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<b>defm </b>ADD : basic_ss<0xf>;
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</pre>
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</div>
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|
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</div>
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|
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</div>
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|
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|
<!-- *********************************************************************** -->
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<h2><a name="codegen">Code Generator backend info</a></h2>
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<!-- *********************************************************************** -->
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|
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<div>
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|
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|
<p>Expressions used by code generator to describe instructions and isel
|
|
patterns:</p>
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|
|
|
<dl>
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|
<dt><tt>(implicit a)</tt></dt>
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|
<dd>an implicitly defined physical register. This tells the dag instruction
|
|
selection emitter the input pattern's extra definitions matches implicit
|
|
physical register definitions.</dd>
|
|
</dl>
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|
</div>
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|
|
|
<!-- *********************************************************************** -->
|
|
<h2><a name="backends">TableGen backends</a></h2>
|
|
<!-- *********************************************************************** -->
|
|
|
|
<div>
|
|
|
|
<p>TODO: How they work, how to write one. This section should not contain
|
|
details about any particular backend, except maybe -print-enums as an example.
|
|
This should highlight the APIs in <tt>TableGen/Record.h</tt>.</p>
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|
|
|
</div>
|
|
|
|
<!-- *********************************************************************** -->
|
|
|
|
<hr>
|
|
<address>
|
|
<a href="http://jigsaw.w3.org/css-validator/check/referer"><img
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src="http://jigsaw.w3.org/css-validator/images/vcss-blue" alt="Valid CSS"></a>
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src="http://www.w3.org/Icons/valid-html401-blue" alt="Valid HTML 4.01"></a>
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|
|
<a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
|
|
<a href="http://llvm.org/">LLVM Compiler Infrastructure</a><br>
|
|
Last modified: $Date$
|
|
</address>
|
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</body>
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</html>
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