mirror of
https://github.com/c64scene-ar/llvm-6502.git
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9d7038c437
Currently, we only codegen the VRINT[APMXZR] and VCVT[BT] instructions when targeting ARMv8, but they are actually present on any target with FP-ARMv8. Note that FP-ARMv8 is called FPv5 when is is part of an M-profile core, but they have the same instructions so we model them both as FPARMv8 in the ARM backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218763 91177308-0d34-0410-b5e6-96231b3b80d8
119 lines
2.8 KiB
LLVM
119 lines
2.8 KiB
LLVM
; RUN: llc < %s -mtriple=armv8-linux-gnueabihf -mattr=+fp-armv8 | FileCheck --check-prefix=CHECK --check-prefix=DP %s
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; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,+d16,+fp-only-sp | FileCheck --check-prefix=SP %s
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; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabihf -mattr=+fp-armv8,+d16 | FileCheck --check-prefix=DP %s
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; CHECK-LABEL: test1
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; CHECK: vrintm.f32
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define float @test1(float %a) {
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entry:
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%call = call float @floorf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test2
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; SP: b floor
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; DP: vrintm.f64
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define double @test2(double %a) {
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entry:
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%call = call double @floor(double %a) nounwind readnone
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ret double %call
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}
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; CHECK-LABEL: test3
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; CHECK: vrintp.f32
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define float @test3(float %a) {
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entry:
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%call = call float @ceilf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test4
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; SP: b ceil
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; DP: vrintp.f64
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define double @test4(double %a) {
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entry:
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%call = call double @ceil(double %a) nounwind readnone
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ret double %call
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}
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; CHECK-LABEL: test5
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; CHECK: vrinta.f32
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define float @test5(float %a) {
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entry:
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%call = call float @roundf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test6
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; SP: b round
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; DP: vrinta.f64
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define double @test6(double %a) {
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entry:
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%call = call double @round(double %a) nounwind readnone
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ret double %call
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}
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; CHECK-LABEL: test7
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; CHECK: vrintz.f32
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define float @test7(float %a) {
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entry:
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%call = call float @truncf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test8
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; SP: b trunc
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; DP: vrintz.f64
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define double @test8(double %a) {
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entry:
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%call = call double @trunc(double %a) nounwind readnone
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ret double %call
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}
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; CHECK-LABEL: test9
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; CHECK: vrintr.f32
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define float @test9(float %a) {
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entry:
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%call = call float @nearbyintf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test10
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; SP: b nearbyint
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; DP: vrintr.f64
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define double @test10(double %a) {
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entry:
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%call = call double @nearbyint(double %a) nounwind readnone
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ret double %call
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}
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; CHECK-LABEL: test11
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; CHECK: vrintx.f32
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define float @test11(float %a) {
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entry:
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%call = call float @rintf(float %a) nounwind readnone
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ret float %call
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}
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; CHECK-LABEL: test12
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; SP: b rint
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; DP: vrintx.f64
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define double @test12(double %a) {
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entry:
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%call = call double @rint(double %a) nounwind readnone
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ret double %call
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}
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declare float @floorf(float) nounwind readnone
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declare double @floor(double) nounwind readnone
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declare float @ceilf(float) nounwind readnone
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declare double @ceil(double) nounwind readnone
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declare float @roundf(float) nounwind readnone
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declare double @round(double) nounwind readnone
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declare float @truncf(float) nounwind readnone
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declare double @trunc(double) nounwind readnone
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declare float @nearbyintf(float) nounwind readnone
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declare double @nearbyint(double) nounwind readnone
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declare float @rintf(float) nounwind readnone
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declare double @rint(double) nounwind readnone
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