Bill Wendling a656b63ee4 Narrow right shifts need to encode their immediates differently from a normal ... shift. 16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0> 32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0> 64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8		2011-03-01 01:00:59 +00:00
..
arm_fixups.s
arm_instructions.s
arm_word_directive.s
bracket-darwin.s
bracket-exprs.s
darwin-ARM-reloc.s
darwin-Thumb-reloc.s
dg.exp
elf-eflags-eabi.s
elf-movt.s
elf-reloc-01.ll
elf-reloc-02.ll
elf-reloc-03.ll
full_line_comment.s
hilo-16bit-relocations.s
neon-abs-encoding.s
neon-absdiff-encoding.s
neon-add-encoding.s
neon-bitcount-encoding.s
neon-bitwise-encoding.s
neon-cmp-encoding.s
neon-convert-encoding.s
neon-dup-encoding.s
neon-minmax-encoding.s
neon-mov-encoding.s
neon-mul-accum-encoding.s
neon-mul-encoding.s
neon-neg-encoding.s
neon-pairwise-encoding.s
neon-reciprocal-encoding.s
neon-reverse-encoding.s
neon-satshift-encoding.s
neon-shift-encoding.s	Narrow right shifts need to encode their immediates differently from a normal	2011-03-01 01:00:59 +00:00
neon-shiftaccum-encoding.s
neon-shuffle-encoding.s
neon-sub-encoding.s
neon-table-encoding.s
neon-vld-encoding.s
neon-vst-encoding.s
neont2-abs-encoding.s
neont2-absdiff-encoding.s
neont2-add-encoding.s
neont2-bitcount-encoding.s
neont2-bitwise-encoding.s
neont2-cmp-encoding.s
neont2-convert-encoding.s
neont2-dup-encoding.s
neont2-minmax-encoding.s
neont2-mov-encoding.s
neont2-mul-accum-encoding.s
neont2-mul-encoding.s
neont2-neg-encoding.s
neont2-pairwise-encoding.s
neont2-reciprocal-encoding.s
neont2-reverse-encoding.s
neont2-satshift-encoding.s
neont2-shift-encoding.s
neont2-shiftaccum-encoding.s
neont2-shuffle-encoding.s
neont2-sub-encoding.s
neont2-table-encoding.s
neont2-vld-encoding.s
neont2-vst-encoding.s
prefetch.ll
reg-list.s
simple-encoding.ll
simple-fp-encoding.s
thumb2_instructions.s
thumb2.s
thumb.s