llvm-6502/test/CodeGen
Jan Vesely a017ce21ba Revert revisions r234755, r234759, r234760
Revert "Remove default in fully-covered switch (to fix Clang -Werror -Wcovered-switch-default)"
Revert "R600: Add carry and borrow instructions. Use them to implement UADDO/USUBO"
Revert "LegalizeDAG: Try to use Overflow operations when expanding ADD/SUB"

Using overflow operations fails CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll
on hexagon, nvptx, and r600. Revert while I investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 17:47:15 +00:00
..
AArch64 Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
ARM Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
BPF
CPP
Generic
Hexagon Revert revisions r234755, r234759, r234760 2015-04-13 17:47:15 +00:00
Inputs
Mips DAGCombiner: Fix crash in select(select) opt. 2015-04-13 17:16:33 +00:00
MSP430
NVPTX Revert revisions r234755, r234759, r234760 2015-04-13 17:47:15 +00:00
PowerPC
R600 Revert revisions r234755, r234759, r234760 2015-04-13 17:47:15 +00:00
SPARC
SystemZ Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
Thumb
Thumb2
WinEH
X86 Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
XCore