Brendon Cahoon a036cd4093 [Hexagon] Generate loop1 instruction for nested loops ... loop1 is for the outer loop and loop0 is for the inner loop. Differential Revision: http://reviews.llvm.org/D9680 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237266 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-13 17:56:03 +00:00
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AArch64	Revert r237247 - [AArch64] Codegen VMAX/VMIN.. as it is causing failures in SPEC2000/2006	2015-05-13 14:03:18 +00:00
ARM	CodeGen: ignore DEBUG_VALUE nodes in KILL tagging	2015-05-12 23:36:18 +00:00
BPF
CPP
Generic	[Statepoints] Support for "patchable" statepoints.	2015-05-12 23:52:24 +00:00
Hexagon	[Hexagon] Generate loop1 instruction for nested loops	2015-05-13 17:56:03 +00:00
Inputs
Mips	[Mips] Return false for isFPCloseToIncomingSP()	2015-05-12 17:14:05 +00:00
MSP430
NVPTX
PowerPC	Fix test added in r236850 for OSX builders.	2015-05-08 14:04:54 +00:00
R600	R600/SI: add pass to mark CF live ranges as non-spillable	2015-05-12 17:13:02 +00:00
SPARC
SystemZ
Thumb
Thumb2
WinEH	Changed renaming of local symbols by inserting a dot vefore the numeric suffix.	2015-05-12 16:47:30 +00:00
X86	[Statepoints] Support for "patchable" statepoints.	2015-05-12 23:52:24 +00:00
XCore