mirror of
https://github.com/c64scene-ar/llvm-6502.git
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f7be7f15c1
The current remark is ambiguous and makes it sounds like explicitly specifying vectorization will allow the loop to be vectorized. This is not the case. The improved remark directs the user to -Rpass-analysis=loop-vectorize to determine the cause of the pass-miss. Reviewed by Arnold Schwaighofer` git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214445 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
4.3 KiB
LLVM
87 lines
4.3 KiB
LLVM
; RUN: opt < %s -loop-vectorize -force-vector-width=4 -S -pass-remarks-missed='loop-vectorize' -pass-remarks-analysis='loop-vectorize' 2>&1 | FileCheck %s
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; CHECK: remark: source.cpp:4:5: loop not vectorized: loop contains a switch statement
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; CHECK: remark: source.cpp:4:5: loop not vectorized: use -Rpass-analysis=loop-vectorize for more info (Force=true, Vector Width=4)
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; CHECK: warning: source.cpp:4:5: loop not vectorized: failed explicitly specified loop vectorization
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; CHECK: _Z11test_switchPii
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; CHECK-NOT: x i32>
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; CHECK: ret
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; Function Attrs: nounwind optsize ssp uwtable
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define void @_Z11test_switchPii(i32* nocapture %A, i32 %Length) #0 {
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entry:
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%cmp18 = icmp sgt i32 %Length, 0, !dbg !10
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br i1 %cmp18, label %for.body.preheader, label %for.end, !dbg !10, !llvm.loop !12
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for.body.preheader: ; preds = %entry
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br label %for.body, !dbg !14
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for.body: ; preds = %for.body.preheader, %for.inc
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%indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i32* %A, i64 %indvars.iv, !dbg !14
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%0 = load i32* %arrayidx, align 4, !dbg !14, !tbaa !16
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switch i32 %0, label %for.inc [
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i32 0, label %sw.bb
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i32 1, label %sw.bb3
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], !dbg !14
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sw.bb: ; preds = %for.body
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%1 = trunc i64 %indvars.iv to i32, !dbg !20
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%mul = shl nsw i32 %1, 1, !dbg !20
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br label %for.inc, !dbg !22
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sw.bb3: ; preds = %for.body
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%2 = trunc i64 %indvars.iv to i32, !dbg !23
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store i32 %2, i32* %arrayidx, align 4, !dbg !23, !tbaa !16
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br label %for.inc, !dbg !23
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for.inc: ; preds = %sw.bb3, %for.body, %sw.bb
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%storemerge = phi i32 [ %mul, %sw.bb ], [ 0, %for.body ], [ 0, %sw.bb3 ]
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store i32 %storemerge, i32* %arrayidx, align 4, !dbg !20, !tbaa !16
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1, !dbg !10
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%lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !10
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%exitcond = icmp eq i32 %lftr.wideiv, %Length, !dbg !10
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br i1 %exitcond, label %for.end.loopexit, label %for.body, !dbg !10, !llvm.loop !12
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for.end.loopexit: ; preds = %for.inc
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br label %for.end
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for.end: ; preds = %for.end.loopexit, %entry
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ret void, !dbg !24
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}
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attributes #0 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!7, !8}
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!llvm.ident = !{!9}
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!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.5.0", i1 true, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !"", i32 2}
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!1 = metadata !{metadata !"source.cpp", metadata !"."}
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!2 = metadata !{}
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!3 = metadata !{metadata !4}
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!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"test_switch", metadata !"test_switch", metadata !"", i32 1, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (i32*, i32)* @_Z11test_switchPii, null, null, metadata !2, i32 1}
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!5 = metadata !{i32 786473, metadata !1}
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!6 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !2, i32 0, null, null, null}
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!7 = metadata !{i32 2, metadata !"Dwarf Version", i32 2}
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!8 = metadata !{i32 2, metadata !"Debug Info Version", i32 1}
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!9 = metadata !{metadata !"clang version 3.5.0"}
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!10 = metadata !{i32 3, i32 8, metadata !11, null}
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!11 = metadata !{i32 786443, metadata !1, metadata !4, i32 3, i32 3, i32 0, i32 0}
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!12 = metadata !{metadata !12, metadata !13, metadata !13}
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!13 = metadata !{metadata !"llvm.loop.vectorize.enable", i1 true}
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!14 = metadata !{i32 4, i32 5, metadata !15, null}
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!15 = metadata !{i32 786443, metadata !1, metadata !11, i32 3, i32 36, i32 0, i32 1}
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!16 = metadata !{metadata !17, metadata !17, i64 0}
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!17 = metadata !{metadata !"int", metadata !18, i64 0}
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!18 = metadata !{metadata !"omnipotent char", metadata !19, i64 0}
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!19 = metadata !{metadata !"Simple C/C++ TBAA"}
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!20 = metadata !{i32 6, i32 7, metadata !21, null}
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!21 = metadata !{i32 786443, metadata !1, metadata !15, i32 4, i32 18, i32 0, i32 2}
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!22 = metadata !{i32 7, i32 5, metadata !21, null}
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!23 = metadata !{i32 9, i32 7, metadata !21, null}
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!24 = metadata !{i32 14, i32 1, metadata !4, null}
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