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https://github.com/c64scene-ar/llvm-6502.git
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29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.5 KiB
Plaintext
63 lines
1.5 KiB
Plaintext
# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s
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#-----------------------------------------------------------------------------
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# Hint encodings
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#-----------------------------------------------------------------------------
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0x1f 0x20 0x03 0xd5
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# CHECK: nop
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0x9f 0x20 0x03 0xd5
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# CHECK: sev
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0xbf 0x20 0x03 0xd5
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# CHECK: sevl
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0x5f 0x20 0x03 0xd5
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# CHECK: wfe
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0x7f 0x20 0x03 0xd5
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# CHECK: wfi
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0x3f 0x20 0x03 0xd5
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# CHECK: yield
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#-----------------------------------------------------------------------------
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# Single-immediate operand instructions
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#-----------------------------------------------------------------------------
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0x5f 0x3a 0x03 0xd5
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# CHECK: clrex #10
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0xdf 0x3f 0x03 0xd5
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# CHECK: isb{{$}}
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0xdf 0x31 0x03 0xd5
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# CHECK: isb #1
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0xbf 0x33 0x03 0xd5
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# CHECK: dmb osh
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0x9f 0x37 0x03 0xd5
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# CHECK: dsb nsh
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0x3f 0x76 0x08 0xd5
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# CHECK: dc ivac
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#-----------------------------------------------------------------------------
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# Generic system instructions
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#-----------------------------------------------------------------------------
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0xff 0x05 0x0a 0xd5
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0xe7 0x6a 0x0f 0xd5
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0xf4 0x3f 0x2e 0xd5
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0xbf 0x40 0x00 0xd5
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0x00 0xb0 0x18 0xd5
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0x00 0xb0 0x38 0xd5
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# CHECK: sys #2, c0, c5, #7
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# CHECK: sys #7, c6, c10, #7, x7
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# CHECK: sysl x20, #6, c3, c15, #7
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# CHECK: msr SPSEL, #0
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# CHECK: msr S3_0_C11_C0_0, x0
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# CHECK: mrs x0, S3_0_C11_C0_0
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0x40 0xc0 0x1e 0xd5
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0x40 0xc0 0x1c 0xd5
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0x40 0xc0 0x18 0xd5
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# CHECK: msr RMR_EL3, x0
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# CHECK: msr RMR_EL2, x0
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# CHECK: msr RMR_EL1, x0
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