mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
dc05f3a64b
Certain ARM instructions accept 32-bit immediate operands encoded as a 8-bit integer value (0-255) and a 4-bit rotation (0-30, even). Current ARM assembly syntax support in LLVM allows the decoded (32-bit) immediate to be specified as a single immediate operand for such instructions: mov r0, #4278190080 The ARMARM defines an extended assembly syntax allowing the encoding to be made more explicit, as in: mov r0, #255, #8 ; (same 32-bit value as above) The behaviour of the two instructions can be different w.r.t flags, which is documented under "Modified immediate constants" in ARMARM. This patch enables support for this extended syntax at the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223113 91177308-0d34-0410-b5e6-96231b3b80d8
365 lines
6.3 KiB
Plaintext
365 lines
6.3 KiB
Plaintext
# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s
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# CHECK: addpl r4, pc, #76, #10
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0x4c 0x45 0x8f 0x52
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# CHECK: b #0
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0x00 0x00 0x00 0xea
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# CHECK: bl #7732
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0x8d 0x07 0x00 0xeb
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# CHECK: bleq #-4
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0xff 0xff 0xff 0x0b
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# CHECK: bfc r8, #0, #16
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0x1f 0x80 0xcf 0xe7
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# CHECK: bfi r8, r0, #16, #1
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0x10 0x88 0xd0 0xe7
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# CHECK: mov pc, lr
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0x0e 0xf0 0xa0 0xe1
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# CHECK: mov pc, #3221225535
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0xff 0xf1 0xa0 0xe3
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# CHECK: movw r7, #4096
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0x00 0x70 0x01 0xe3
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# CHECK: cmn r0, #1
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0x01 0x00 0x70 0xe3
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# CHECK: dmb
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0x5f 0xf0 0x7f 0xf5
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# CHECK: dmb nshst
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0x56 0xf0 0x7f 0xf5
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# CHECK: dsb
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0x4f 0xf0 0x7f 0xf5
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# CHECK: dsb st
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0x4e 0xf0 0x7f 0xf5
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# CHECK: isb
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0x6f 0xf0 0x7f 0xf5
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# FIXME: LDC encoding information is incorrect. Re-enable this along with more
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# robust testing for other values when we get it fleshed out and working
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# properly.
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# CHECKx: ldclvc p5, cr15, [r8], #-0
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#0x00 0xf5 0x78 0x7c
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# CHECK: ldc p13, c9, [r2, #0]!
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0x00 0x9d 0xb2 0xed
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# CHECK: ldcl p1, c9, [r3, #0]!
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0x00 0x91 0xf3 0xed
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# CHECK: ldr r0, [r2], #15
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0x0f 0x00 0x92 0xe4
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# CHECK: ldr r5, [r7, -r10, lsl #2]
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0x0a 0x51 0x17 0xe7
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# CHECK: ldr r4, [r5, #0]!
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0x00 0x40 0xb5 0xe5
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# CHECK: ldrb lr, [r10, #0]!
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0x00 0xe0 0xfa 0xe5
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# CHECK: ldrd r4, r5, [r0, #0]!
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0xd0 0x40 0xe0 0xe1
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# CHECK: ldrh r0, [r2], #0
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0xb0 0x00 0xd2 0xe0
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# CHECK: ldrh r0, [r2]
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0xb0 0x00 0xd2 0xe1
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# CHECK: ldrh lr, [sp, #0]!
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0xb0 0xe0 0xfd 0xe1
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# CHECK: ldrht r0, [r2], #15
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0xbf 0x00 0xf2 0xe0
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# CHECK: ldrsb r1, [lr, #0]!
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0xd0 0x10 0xfe 0xe1
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# CHECK: ldrsbtvs lr, [r2], -r9
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0xd9 0xe0 0x32 0x60
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# CHECK: ldrsh r9, [r1, #0]
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0xf0 0x90 0xf1 0xe1
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# CHECK: lsls r0, r2, #31
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0x82 0x0f 0xb0 0xe1
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# CHECK: mcr2 p0, #0, r2, c1, c0, #7
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0xf0 0x20 0x01 0xfe
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# CHECK: movt r8, #65535
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0xff 0x8f 0x4f 0xe3
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# CHECK: mvnspl r7, #1073741885
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0xf5 0x71 0xf0 0x53
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# CHECK-NOT: orr r7, r8, r7, rrx #0
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# CHECK: orr r7, r8, r7, rrx
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0x67 0x70 0x88 0xe1
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# CHECK: pkhbt r8, r9, r10, lsl #4
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0x1a 0x82 0x89 0xe6
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# CHECK-NOT: pkhbtls r10, r11, r11, lsl #0
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# CHECK: pkhbtls r10, r11, r11
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0x1b 0xa0 0x8b 0x96
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# CHECK: pkhtbmi lr, r1, r6, asr #21
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0xd6 0xea 0x81 0x46
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# CHECK: pop {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0xbd 0xe8
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# CHECK: push {r0, r2, r4, r6, r8, r10}
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0x55 0x05 0x2d 0xe9
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# CHECK: qsax r8, r9, r10
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0x5a 0x8f 0x29 0xe6
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# CHECK: rfedb r0!
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0x00 0x0a 0x30 0xf9
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# CHECK: srsdb sp!, #19
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0x13 0x05 0x6d 0xf9
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# CHECK: srsia sp, #9
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0x09 0x05 0xcd 0xf8
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# CHECK-NOT: rsbeq r0, r2, r0, lsl #0
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# CHECK: rsbeq r0, r2, r0
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0x00 0x00 0x62 0x00
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# CHECK-NOT: rscseq r0, r0, r1, lsl #0
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# CHECK: rscseq r0, r0, r1
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0x01 0x00 0xf0 0x00
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# CHECK: sbcs r0, pc, #1
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0x01 0x00 0xdf 0xe2
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# CHECK: sbfx r0, r1, #0, #8
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0x51 0x00 0xa7 0xe7
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# CHECK: ssat r8, #1, r10, lsl #8
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0x1a 0x84 0xa0 0xe6
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# CHECK-NOT: ssatmi r0, #17, r12, lsl #0
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# CHECK: ssatmi r0, #17, r12
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0x1c 0x00 0xb0 0x46
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# CHECK: stmdb r10!, {r4, r5, r6, r7, lr}
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0xf0 0x40 0x2a 0xe9
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# CHECK: teq r0, #31
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0x1f 0x00 0x30 0xe3
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# CHECK: ubfx r0, r0, #16, #1
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0x50 0x08 0xe0 0xe7
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# CHECK: usat r8, #0, r10, asr #32
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0x5a 0x80 0xe0 0xe6
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# CHECK: setend be
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0x00 0x02 0x01 0xf1
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# CHECK: setend le
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0x00 0x00 0x01 0xf1
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# CHECK: cpsie aif
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0xc0 0x01 0x08 0xf1
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# CHECK: cps #15
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0x0f 0x00 0x02 0xf1
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# CHECK: cpsie if, #10
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0xca 0x00 0x0a 0xf1
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# CHECK: msr CPSR_fc, r0
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0x00 0xf0 0x29 0xe1
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# CHECK: msrmi CPSR_c, #4043309056
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0xf1 0xf4 0x21 0x43
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# CHECK: rsbs r6, r7, r8
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0x08 0x60 0x77 0xe0
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# CHECK: blxeq r5
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0x35 0xff 0x2f 0x01
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# CHECK: bx r12
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0x1c 0xff 0x2f 0xe1
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# CHECK: bxeq r5
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0x15 0xff 0x2f 0x01
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# CHECK: uqadd16mi r6, r11, r8
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0x18 0x6F 0x6b 0x46
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# CHECK: str r0, [sp, #4]
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0x04 0x00 0x8d 0xe5
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# CHECK: str r1, [sp]
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0x00 0x10 0x8d 0xe5
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# CHECK: ldr r3, [pc, #144]
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0x90 0x30 0x9f 0xe5
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# CHECK: ldr r3, [r0, #-4]
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0x4 0x30 0x10 0xe5
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# CHECK: ldr r5, [sp, r0, lsl #1]!
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0x80 0x50 0xbd 0xe7
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# CHECK: ldr r5, [r7], -r0, lsr #2
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0x20 0x51 0x17 0xe6
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# CHECK: strdeq r2, r3, [r0], -r8
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0xf8 0x20 0x00 0x00
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# CHECK: ldrdeq r2, r3, [r0], -r12
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0xdc 0x24 0x00 0x00
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# CHECK: ldrbt r3, [r4], -r5, lsl #12
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0x05 0x36 0x74 0xe6
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# CHECK: vcmpe.f64 d8, #0
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0xc0 0x8b 0xb5 0xee
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# CHECK: vldmdb r2!, {s7, s8, s9, s10, s11}
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0x05 0x3a 0x72 0xed
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# CHECK: vldr s23, [r2, #660]
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0xa5 0xba 0xd2 0xed
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# CHECK: strtvc r5, [r3], r0, lsr #20
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0x20 0x5a 0xa3 0x76
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# CHECK: stmiblo sp, {r0, r4, r8, r11, r12, pc}
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0x11 0x99 0x8d 0x39
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# CHECK: ldmdb sp, {r0, r4, r8, r11, r12, pc}
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0x11 0x99 0x1d 0xe9
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# CHECK: swpge r3, r2, [r6]
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0x92 0x30 0x06 0xa1
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# CHECK: umull r1, r2, r3, r4
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0x93 0x14 0x82 0xe0
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# CHECK: pldw [pc, #-0]
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0x00 0xf0 0x1f 0xf5
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# CHECK: pli [pc, #-0]
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0x00 0xf0 0x5f 0xf4
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# CHECK: pli [r3, r1, lsl #2]
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0x01 0xf1 0xd3 0xf6
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# CHECK: stc p2, c4, [r9], {157}
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0x9d 0x42 0x89 0xec
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# CHECK: stc p15, c0, [r3, #0]!
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0x00 0x0f 0xa3 0xed
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# CHECK: stc2 p2, c4, [r9], {157}
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0x9d 0x42 0x89 0xfc
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# CHECK: stcl p13, c12, [r9, #0]!
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0x00 0xcd 0xe9 0xed
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# CHECK: str pc, [r11, #0]!
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0x00 0xf0 0xab 0xe5
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# CHECK: strb r9, [r10, #0]!
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0x00 0x90 0xea 0xe5
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# CHECK: strd r12, sp, [r6, #0]!
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0xf0 0xc0 0xe6 0xe1
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# CHECK: strh r7, [r9, #0]!
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0xb0 0x70 0xe9 0xe1
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# CHECK: bne #-24
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0xfa 0xff 0xff 0x1a
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# CHECK: blx #60
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0x0f 0x00 0x00 0xfa
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# CHECK-NOT: adcs r10, r8, r0, asr #6
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# CHECK: adcshi r10, r8, r0, asr #6
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0x40 0xa3 0xb8 0x80
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# CHECK: adcshi r10, r8, r0, asr r3
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0x50 0xa3 0xb8 0x80
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# CHECK: streq r1, [sp], #-1567
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0x1f 0x16 0xd 0x4
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# CHECK: mrchs p2, #3, r11, c13, c6, #6
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0xd6 0xb2 0x7d 0x2e
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# CHECK: smlsldx r4, r12, r11, r4
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0x7b 0x44 0x4c 0xe7
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# CHECK: lsl r3, r2, r1
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0x12 0x31 0xa0 0xe1
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# CHECK: sxtab r9, r8, r5
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0x75 0x90 0xa8 0xe6
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# CHECK: sxtb r9, r5, ror #8
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0x75 0x94 0xaf 0xe6
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# CHECK: bfc r5, #0, #16
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0x1f 0x50 0xcf 0xe7
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# CHECK: bfi r5, r6, #0, #16
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0x16 0x50 0xcf 0xe7
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# CHECK: sbfx r5, r6, #8, #8
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0x56 0x54 0xa7 0xe7
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# CHECK: rsb pc, r5, r0
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0x00 0xf0 0x65 0xe0
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# CHECK: uqadd8 r5, r6, r7
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0x97 0x5f 0x66 0xe6
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# CHECK: uqsax r5, r6, r7
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0x57 0x5f 0x66 0xe6
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# CHECK: smmlareq r0, r0, r0, r0
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0x30 0x00 0x50 0x07
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# CHECK: nop
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0x00 0xf0 0x20 0xe3
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# CHECK: andeq r0, r0, r0, lsr #32
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0x20 0x00 0x00 0x00
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# CHECK: strb r3, [r2], #1
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0x01 0x30 0xc2 0xe4
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# CHECK: strheq r0, [r0, -r0]
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0xb0 0x00 0x00 0x01
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# CHECK: rfedb #4!
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0x14 0x0 0x32 0xf9
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# CHECK: stc2l p0, c0, [r2], #-96
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0x18 0x0 0x62 0xfc
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# CHECK: ldmgt sp!, {r9}
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0x00 0x02 0xbd 0xc8
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