Evan Cheng 6b8e5a9318 Make sure the register pressure reduction schedulers work for non-uniform ... latency targets, e.g. PPC32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28561 91177308-0d34-0410-b5e6-96231b3b80d8		2006-05-30 18:05:39 +00:00
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SelectionDAG	Make sure the register pressure reduction schedulers work for non-uniform	2006-05-30 18:05:39 +00:00
AsmPrinter.cpp	Remove dead var	2006-05-12 17:50:35 +00:00
BranchFolding.cpp
DwarfWriter.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
ELFWriter.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp	Patches to make the LLVM sources more -pedantic clean. Patch provided	2006-05-24 17:04:05 +00:00
LiveVariables.cpp	Remove a bunch more dead V9 specific stuff	2006-05-04 01:26:39 +00:00
MachineBasicBlock.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
MachineDebugInfo.cpp
MachineFunction.cpp	Print the vreg that livein physregs are live in	2006-05-16 05:55:30 +00:00
MachineInstr.cpp	Remove a bogus cast.	2006-05-26 08:00:14 +00:00
Makefile
Passes.cpp
PHIElimination.cpp
PhysRegTracker.h
PrologEpilogInserter.cpp	Remove dead variable	2006-05-12 18:02:04 +00:00
RegAllocLinearScan.cpp	If the register allocator cannot find a register to spill, try the aliases. If	2006-05-12 19:07:46 +00:00
RegAllocLocal.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
RegAllocSimple.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
TwoAddressInstructionPass.cpp	Patches to make the LLVM sources more -pedantic clean. Patch provided	2006-05-24 17:04:05 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp	Move some methods out of MachineInstr into MachineOperand	2006-05-04 17:52:23 +00:00
VirtRegMap.h