Evan Cheng 6b8e5a9318 Make sure the register pressure reduction schedulers work for non-uniform ... latency targets, e.g. PPC32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28561 91177308-0d34-0410-b5e6-96231b3b80d8		2006-05-30 18:05:39 +00:00
..
DAGCombiner.cpp	Fix a nasty dag combiner bug that caused nondeterminstic crashes (MY FAVORITE!):	2006-05-27 00:43:02 +00:00
LegalizeDAG.cpp	Change RET node to include signness information of the return values. e.g.	2006-05-26 23:09:09 +00:00
Makefile
ScheduleDAG.cpp	lib/Target/Target.td	2006-05-18 20:42:07 +00:00
ScheduleDAGList.cpp	When a priority_queue is empty, the behavior of top() operator is	2006-05-30 18:04:34 +00:00
ScheduleDAGRRList.cpp	Make sure the register pressure reduction schedulers work for non-uniform	2006-05-30 18:05:39 +00:00
ScheduleDAGSimple.cpp	Refactor a bunch of includes so that TargetMachine.h doesn't have to include	2006-05-12 06:33:49 +00:00
SelectionDAG.cpp	Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo	2006-05-16 22:53:20 +00:00
SelectionDAGISel.cpp	Make CALL node consistent with RET node. Signness of value has type MVT::i32	2006-05-26 23:13:20 +00:00
SelectionDAGPrinter.cpp	print arbitrary constant pool entries	2006-03-05 09:38:03 +00:00
TargetLowering.cpp	Another typo. Pointed out by Nate Begeman.	2006-05-17 18:22:14 +00:00