mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-28 04:29:44 +00:00
740cd657f3
LSR always tries to make the ICmp in the loop latch use the incremented induction variable. This allows the induction variable to be kept in a single register. When the induction variable limit is equal to the stride, SimplifySetCC() would break LSR's hard work by transforming: (icmp (add iv, stride), stride) --> (cmp iv, 0) This forced us to use lea for the IC update, preventing the simpler incl+cmp. <rdar://problem/7643606> <rdar://problem/11184260> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154119 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.4 KiB
LLVM
37 lines
1.4 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -relocation-model=pic | FileCheck %s
|
|
; rdar://7387640
|
|
|
|
; This now reduces to a single induction variable.
|
|
|
|
@G = external global i32 ; <i32*> [#uses=2]
|
|
@array = external global i32* ; <i32**> [#uses=1]
|
|
|
|
define void @t() nounwind optsize {
|
|
; CHECK: t:
|
|
; CHECK: mov{{.*}}, #1000
|
|
entry:
|
|
%.pre = load i32* @G, align 4 ; <i32> [#uses=1]
|
|
br label %bb
|
|
|
|
bb: ; preds = %bb, %entry
|
|
; CHECK: LBB0_1:
|
|
; CHECK: subs [[R2:r[0-9]+]], #1
|
|
; CHECK: cmp.w [[R2]], #-1
|
|
; CHECK: bne LBB0_1
|
|
|
|
%0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1]
|
|
%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2]
|
|
%tmp5 = sub i32 1000, %indvar ; <i32> [#uses=1]
|
|
%1 = load i32** @array, align 4 ; <i32*> [#uses=1]
|
|
%scevgep = getelementptr i32* %1, i32 %tmp5 ; <i32*> [#uses=1]
|
|
%2 = load i32* %scevgep, align 4 ; <i32> [#uses=1]
|
|
%3 = add nsw i32 %2, %0 ; <i32> [#uses=2]
|
|
store i32 %3, i32* @G, align 4
|
|
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
|
|
%exitcond = icmp eq i32 %indvar.next, 1001 ; <i1> [#uses=1]
|
|
br i1 %exitcond, label %return, label %bb
|
|
|
|
return: ; preds = %bb
|
|
ret void
|
|
}
|