llvm-6502/test/MC
Jakob Stoklund Olesen a0ed0c0fcd Insert dummy ED table entries for pseudo-instructions.
The table is indexed by opcode, so simply removing pseudo-instructions
creates a wrong mapping from opcode to table entry.

Add a test case for xorps which has a very high opcode that exposes this
problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:30:16 +00:00
..
ARM Enable ARM mode VDUP(scalar) tests. 2011-10-07 23:57:03 +00:00
AsmParser Added regression test for bug #10869. 2011-09-19 07:48:08 +00:00
COFF
Disassembler Insert dummy ED table entries for pseudo-instructions. 2011-10-10 18:30:16 +00:00
ELF Fix the bitwidth of the remaining fields. 2011-08-04 17:00:11 +00:00
MachO Fix a Darwin x86_64 special case of a jmp to a temporary symbol from an atom 2011-09-08 20:53:44 +00:00
MBlaze
X86 Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. 2011-10-07 05:35:38 +00:00