llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-04 21:31:03 +00:00

History

Jakob Stoklund Olesen 3247af2949 Add <imp-def> operands when reloading into physregs.

When an instruction only writes sub-registers, it is still necessary to
add an <imp-def> operand for the super-register.  When reloading into a
virtual register, rewriting will add the operand, but when loading
directly into a virtual register, the <imp-def> operand is still
necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152095 91177308-0d34-0410-b5e6-96231b3b80d8

2012-03-06 02:48:17 +00:00

Analysis

A few more cases of missing masking in ComputeMaskedBits; found by inspection.

2012-03-05 23:22:40 +00:00