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a0f14afee1
llvm-6502/lib
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Jack Carter a0f14afee1 Mips specific inline asm operand modifier 'M': 
Print the high order register of a double word register operand.

In 32 bit mode, a 64 bit double word integer will be represented
by 2 32 bit registers. This modifier causes the high order register
to be used in the asm expression. It is useful if you are using 
doubles in assembler and continue to control register to variable
relationships.

This patch also fixes a related bug in a previous patch:

    case 'D': // Second part of a double word register operand
    case 'L': // Low order register of a double word register operand
    case 'M': // High order register of a double word register operand

I got 'D' and 'M' confused. The second part of a double word operand
will only match 'M' for one of the endianesses. I had 'L' and 'D'
be the opposite twins when 'L' and 'M' are.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160429 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 06:41:36 +00:00
..
Analysis Move llvm/Support/TypeBuilder.h -> llvm/TypeBuilder.h. This completes 2012-07-15 23:45:24 +00:00
Archive
AsmParser Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
Bitcode llvm/lib: [CMake] Add explicit dependency to intrinsics_gen. 2012-06-24 13:32:01 +00:00
CodeGen ignore 'invoke @llvm.donothing', but still keep the edge to the continuation BB 2012-07-18 00:07:17 +00:00
DebugInfo Improve behavior of DebugInfoEntryMinimal::getSubprogramName() introduced in r159512. 2012-07-17 15:28:35 +00:00
ExecutionEngine Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp and 2012-06-28 00:05:13 +00:00
Linker Extend the IL for selecting TLS models (PR9788) 2012-06-23 11:37:03 +00:00
MC I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
Object Fixed few warnings. 2012-07-18 04:06:49 +00:00
Support simplify getSetSize() per Duncan's comments 2012-07-17 15:43:59 +00:00
TableGen TableGen: Location information for diagnostic. 2012-07-12 00:53:31 +00:00
Target Mips specific inline asm operand modifier 'M': 2012-07-18 06:41:36 +00:00
Transforms indvars: drive by heuristics fix. 2012-07-18 04:35:13 +00:00
VMCore More replacing of target-dependent intrinsics with target-indepdent 2012-07-18 00:02:16 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile