llvm-6502/test/MC
Craig Topper f6145affbf [X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.
Requires new AsmParserOperand types that detect 16-bit and 32/64-bit mode so that we choose the right instruction based on default sizing without predicates. This is necessary since predicates mess up the disassembler table building.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225256 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-06 08:59:30 +00:00
..
AArch64
ARM Parse Tag_compatibility correctly. 2015-01-05 13:26:37 +00:00
AsmParser
COFF
Disassembler [X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16. 2015-01-06 08:59:30 +00:00
ELF
Hexagon
MachO Add a testcase that would have found the problem in r225048. 2015-01-06 01:41:24 +00:00
Markup
Mips
PowerPC
R600
Sparc
SystemZ
X86