llvm-6502/test/CodeGen
Anton Korobeynikov 2386fc8daa Factor out type info emission into separate routine.
It turned out that ARM wants different layout of type infos.
This is yet another patch in attempt to fix PR7187 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168325 91177308-0d34-0410-b5e6-96231b3b80d8
2012-11-19 21:06:26 +00:00
..
ARM Factor out type info emission into separate routine. 2012-11-19 21:06:26 +00:00
CPP test commit 2012-07-18 17:53:05 +00:00
Generic Codegen support for arbitrary vector getelementptrs. 2012-11-13 13:01:58 +00:00
Hexagon test/CodeGen/Hexagon/postinc-load.ll: Suppress it for now. It triggered the failure on i686 hosts. 2012-11-14 22:22:37 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Initial implementation of MipsTargetLowering::isLegalAddressingMode. 2012-11-17 00:25:41 +00:00
MSP430 Fix fallout from RegInfo => FrameLowering refactoring on MSP430. 2012-10-17 17:37:11 +00:00
NVPTX [NVPTX] Order global variables in def-use order before emiting them in the final assembly 2012-11-16 21:03:51 +00:00
PowerPC Use a full triple for a PPC test case for asm syntax. 2012-11-18 06:21:03 +00:00
SPARC Use TargetTransformInfo to control switch-to-lookup table transformation 2012-10-30 11:23:25 +00:00
Thumb Convert an improper CodeGen test to a MC test. 2012-11-10 04:30:40 +00:00
Thumb2 Add GPRPair Register class to ARM. 2012-10-26 21:29:15 +00:00
X86 Handle mixed normal and early-clobber defs on inline asm. 2012-11-19 19:31:10 +00:00
XCore Fix handling of aliases to functions. 2012-11-16 21:12:38 +00:00