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652199961a
reversed. This leads to wrong codegen for float-to-half conversion intrinsics which are used to support storage-only fp16 type. NEON variants of same instructions are fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161907 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
992 B
LLVM
33 lines
992 B
LLVM
; RUN: llc < %s | FileCheck %s
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; RUN: llc -mattr=+vfp3,+fp16 < %s | FileCheck --check-prefix=CHECK-FP16 %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
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target triple = "armv7-eabi"
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@x = global i16 12902
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@y = global i16 0
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@z = common global i16 0
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define arm_aapcs_vfpcc void @foo() nounwind {
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; CHECK: foo:
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; CHECK-FP6: foo:
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entry:
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%0 = load i16* @x, align 2
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%1 = load i16* @y, align 2
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%2 = tail call float @llvm.convert.from.fp16(i16 %0)
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; CHECK: __gnu_h2f_ieee
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; CHECK-FP16: vcvtb.f32.f16
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%3 = tail call float @llvm.convert.from.fp16(i16 %1)
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; CHECK: __gnu_h2f_ieee
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; CHECK-FP16: vcvtb.f32.f16
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%4 = fadd float %2, %3
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%5 = tail call i16 @llvm.convert.to.fp16(float %4)
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; CHECK: __gnu_f2h_ieee
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; CHECK-FP16: vcvtb.f16.f32
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store i16 %5, i16* @x, align 2
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ret void
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}
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declare float @llvm.convert.from.fp16(i16) nounwind readnone
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declare i16 @llvm.convert.to.fp16(float) nounwind readnone
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