llvm-6502/lib
Chris Lattner a16b7cb1d3 Two changes:
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-20 06:08:29 +00:00
..
Analysis Now IndVarSimplify is a LoopPass. 2007-03-07 06:39:01 +00:00
Archive
AsmParser Regenerate. 2007-03-20 01:13:36 +00:00
Bytecode Use a simpler constructor for ConstantInt. 2007-03-01 20:25:31 +00:00
CodeGen Remove -reduce-joining-phys-regs options. Make it on by default. 2007-03-19 18:08:26 +00:00
Debugger
ExecutionEngine Unbreak C++ build. 2007-03-12 17:57:00 +00:00
Linker
Support Fix coding standards violation. 2007-03-19 21:19:02 +00:00
System Fix mingw32 build 2007-03-19 20:19:08 +00:00
Target Two changes: 2007-03-20 06:08:29 +00:00
Transforms use types of loads and stores, not address, in CheckForIVReuse 2007-03-20 00:47:50 +00:00
VMCore Fix a nasty memory leak, caused by my revamp of the value symbol table. 2007-03-20 00:18:10 +00:00
Makefile