llvm-6502/test/CodeGen/Mips/powif64_16.ll
Simon Atanasyan c5e99819f4 [Mips] Adjust float ABI settings in case of MIPS16 mode.
Hard float for mips16 means essentially to compile as soft float but to
use a runtime library for soft float that is written with native mips32
floating point instructions (those runtime routines run in mips32 hard
float mode).

The patch reviewed by Reed Kotler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195123 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 12:20:17 +00:00

27 lines
1.1 KiB
LLVM

; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s
declare float @llvm.powi.f32(float %Val, i32 %power)
declare double @llvm.powi.f64(double %Val, i32 %power)
define float @foo_pow_f32(float %y, i32 %p) {
%1 = tail call float @llvm.powi.f32(float %y, i32 %p)
; CHECK-NOT: .ent __call_stub_fp_llvm.powi.f32
; CHECK-NOT: {{.*}} jal llvm.powi.f32
ret float %1
}
define double @foo_pow_f64(double %y, i32 %p) {
%1 = tail call double @llvm.powi.f64(double %y, i32 %p)
; CHECK-NOT: .ent __call_stub_fp_llvm.powi.f64
; CHECK-NOT: {{.*}} jal llvm.powi.f64
ret double %1
}
attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #1 = { nounwind readonly }
!0 = metadata !{metadata !"double", metadata !1}
!1 = metadata !{metadata !"omnipotent char", metadata !2}
!2 = metadata !{metadata !"Simple C/C++ TBAA"}
!3 = metadata !{metadata !"int", metadata !1}