mirror of
https://github.com/c64scene-ar/llvm-6502.git
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395f4f4b2a
This is a re-commit of r235101, which also fixes the problems with the previous patch: - Switches with only a default case and non-fallthrough were handled incorrectly - The previous patch tickled a bug in PowerPC Early-Return Creation which is fixed here. > This is a major rewrite of the SelectionDAG switch lowering. The previous code > would lower switches as a binary tre, discovering clusters of cases > suitable for lowering by jump tables or bit tests as it went along. To increase > the likelihood of finding jump tables, the binary tree pivot was selected to > maximize case density on both sides of the pivot. > > By not selecting the pivot in the middle, the binary trees would not always > be balanced, leading to performance problems in the generated code. > > This patch rewrites the lowering to search for clusters of cases > suitable for jump tables or bit tests first, and then builds the binary > tree around those clusters. This way, the binary tree will always be balanced. > > This has the added benefit of decoupling the different aspects of the lowering: > tree building and jump table or bit tests finding are now easier to tweak > separately. > > For example, this will enable us to balance the tree based on profile info > in the future. > > The algorithm for finding jump tables is quadratic, whereas the previous algorithm > was O(n log n) for common cases, and quadratic only in the worst-case. This > doesn't seem to be major problem in practice, e.g. compiling a file consisting > of a 10k-case switch was only 30% slower, and such large switches should be rare > in practice. Compiling e.g. gcc.c showed no compile-time difference. If this > does turn out to be a problem, we could limit the search space of the algorithm. > > This commit also disables all optimizations during switch lowering in -O0. > > Differential Revision: http://reviews.llvm.org/D8649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235560 91177308-0d34-0410-b5e6-96231b3b80d8
61 lines
2.0 KiB
LLVM
61 lines
2.0 KiB
LLVM
; RUN: llc -mcpu=pwr7 -code-model=medium <%s | FileCheck %s
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; RUN: llc -mcpu=pwr7 -code-model=large <%s | FileCheck %s
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; Test correct code generation for medium and large code model
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; for loading the address of a jump table from the TOC.
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define signext i32 @test_jump_table(i32 signext %i) nounwind {
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entry:
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%i.addr = alloca i32, align 4
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store i32 %i, i32* %i.addr, align 4
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%0 = load i32, i32* %i.addr, align 4
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switch i32 %0, label %sw.default [
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i32 3, label %sw.bb
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i32 4, label %sw.bb1
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i32 5, label %sw.bb2
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i32 6, label %sw.bb3
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]
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sw.default: ; preds = %entry
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br label %sw.epilog
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sw.bb: ; preds = %entry
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%1 = load i32, i32* %i.addr, align 4
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%mul = mul nsw i32 %1, 7
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store i32 %mul, i32* %i.addr, align 4
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br label %sw.bb1
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sw.bb1: ; preds = %entry, %sw.bb
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%2 = load i32, i32* %i.addr, align 4
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%dec = add nsw i32 %2, -1
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store i32 %dec, i32* %i.addr, align 4
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br label %sw.bb2
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sw.bb2: ; preds = %entry, %sw.bb1
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%3 = load i32, i32* %i.addr, align 4
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%add = add nsw i32 %3, 3
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store i32 %add, i32* %i.addr, align 4
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br label %sw.bb3
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sw.bb3: ; preds = %entry, %sw.bb2
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%4 = load i32, i32* %i.addr, align 4
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%shl = shl i32 %4, 1
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store i32 %shl, i32* %i.addr, align 4
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br label %sw.epilog
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sw.epilog: ; preds = %sw.bb3, %sw.default
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%5 = load i32, i32* %i.addr, align 4
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ret i32 %5
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}
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; CHECK-LABEL: test_jump_table:
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; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
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; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
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; CHECK: ldx {{[0-9]+}}, {{[0-9]+}}, [[REG2]]
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; CHECK: .section .toc
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; CHECK: .LC[[TOCNUM]]:
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; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
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