Dan Gohman 8c050fadf6 Add a CHECK line to check the position of the second divsd. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83009 91177308-0d34-0410-b5e6-96231b3b80d8		2009-09-28 20:48:39 +00:00
..
Alpha
ARM	Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of	2009-09-28 05:28:43 +00:00
Blackfin	Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of	2009-09-28 05:28:43 +00:00
CBackend
CellSPU	Convert more tests to avoid llvm-as.	2009-09-11 18:36:27 +00:00
CPP
Generic	Convert more tests to avoid llvm-as.	2009-09-11 18:36:27 +00:00
Mips
MSP430	Allow symbols to start from the digit if target requests it. This allows, e.g. pinning	2009-09-18 16:57:42 +00:00
PIC16
PowerPC	Add nounwind to this test.	2009-09-24 20:20:08 +00:00
SPARC	several major improvements to the sparc backend: support for weak linkage	2009-09-15 17:46:24 +00:00
SystemZ
Thumb
Thumb2	Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo	2009-09-28 09:14:39 +00:00
X86	Add a CHECK line to check the position of the second divsd.	2009-09-28 20:48:39 +00:00
XCore