Chris Lattner a26a8471bd now that fp reg kill insertion stuff happens as a separate ... pass after isel instead of being interlaced with it, we can trust that all the code for a function has been isel'd before it is run. The practical impact of this is that we can scan for machine instr phis instead of doing a fuzzy match on the LLVM BB for phi nodes. Doing the fuzzy match required knowing when isel would produce an fp reg stack phi which was gross. It was also wrong in cases where select got lowered to a branch tree because cmovs aren't available (PR6828). Just do the scan on machine phis which is simpler, faster and more correct. This fixes PR6828. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104333 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-21 18:17:54 +00:00
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Alpha
ARM	Teach VirtRegRewriter to handle spilling in instructions that have multiple	2010-05-21 16:36:13 +00:00
Blackfin	Start function numbering at 0.	2010-04-17 16:29:15 +00:00
CBackend
CellSPU	Make SPU backend not assert on jump tables.	2010-05-11 11:00:02 +00:00
CPP
Generic	Enable a bunch more -regalloc=fast tests	2010-05-12 00:11:24 +00:00
MBlaze
Mips	Start function numbering at 0.	2010-04-17 16:29:15 +00:00
MSP430	Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),	2010-05-01 12:52:34 +00:00
PIC16
PowerPC	Only use clairvoyance when defining a register, and then only if it has one use.	2010-05-17 04:50:57 +00:00
SPARC
SystemZ	SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and	2010-05-14 22:17:42 +00:00
Thumb	Enable a bunch more -regalloc=fast tests	2010-05-12 00:11:24 +00:00
Thumb2	t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM.	2010-05-19 07:28:01 +00:00
X86	now that fp reg kill insertion stuff happens as a separate	2010-05-21 18:17:54 +00:00
XCore	Start function numbering at 0.	2010-04-17 16:29:15 +00:00