Kalle Raiskila 7ea1ab5f41 Fix memory access lowering on SPU, adding ... support for the case where alignment<value size. These cases were silently miscompiled before this patch. Now they are overly verbose -especially storing is- and any front-end should still avoid misaligned memory accesses as much as possible. The bit juggling algorithm added here probably has some room for improvement still. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118889 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-12 10:14:03 +00:00
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Alpha
ARM	Add support for ARM's specialized vector-compare-against-zero instructions.	2010-11-08 23:21:22 +00:00
Blackfin
CBackend
CellSPU	Fix memory access lowering on SPU, adding	2010-11-12 10:14:03 +00:00
CPP
Generic	When passing a huge parameter using the byval mechanism, a long	2010-11-04 21:16:46 +00:00
MBlaze
Mips	Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com>	2010-11-12 00:38:32 +00:00
MSP430	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
PowerPC	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
PTX
SPARC	Inline asm mult-alt constraint tests.	2010-11-02 23:01:44 +00:00
SystemZ
Thumb	Do not use MEMBARRIER_MCR for any Thumb code.	2010-11-09 22:50:44 +00:00
Thumb2	Two sets of changes. Sorry they are intermingled.	2010-11-03 00:45:17 +00:00
X86	Remove the memmove->memcpy optimization from CodeGen. MemCpyOpt does this.	2010-11-11 16:24:49 +00:00
XCore
thumb2-mul.ll