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https://github.com/c64scene-ar/llvm-6502.git
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86245071b5
Print the range of registers used with a single letter prefix. This better matches what the shader compiler produces and is overall less obnoxious than concatenating all of the subregister names together. Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1, it will print s[0:1] and so on. There doesn't appear to be a straightforward way to get the actual register info in the InstPrinter, so this parses the generated name to print with the new syntax. The required test changes are pretty nasty, and register matching regexes are now worse. Since there isn't a way to add to a variable in FileCheck, some of the tests now don't check the exact number of registers used, but I don't think that will be a real problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194443 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.6 KiB
LLVM
43 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s
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; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and
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; the global address space(1) uses 64-bit pointers. These tests check to make sure
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; the correct pointer size is used for the local address space.
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; The e{{32|64}} suffix on the instructions refers to the encoding size and not
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; the size of the operands. The operand size is denoted in the instruction name.
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; Instructions with B32, U32, and I32 in their name take 32-bit operands, while
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; instructions with B64, U64, and I64 take 64-bit operands.
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; CHECK-LABEL: @local_address_load
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; CHECK: V_MOV_B32_e{{32|64}} [[PTR:v[0-9]]]
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; CHECK: DS_READ_B32 [[PTR]]
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define void @local_address_load(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = load i32 addrspace(3)* %in
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store i32 %0, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: @local_address_gep
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; CHECK: V_ADD_I32_e{{32|64}} [[PTR:v[0-9]]]
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; CHECK: DS_READ_B32 [[PTR]]
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define void @local_address_gep(i32 addrspace(1)* %out, i32 addrspace(3)* %in, i32 %offset) {
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entry:
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%0 = getelementptr i32 addrspace(3)* %in, i32 %offset
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%1 = load i32 addrspace(3)* %0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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; CHECK-LABEL: @local_address_gep_const_offset
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; CHECK: V_ADD_I32_e{{32|64}} [[PTR:v[0-9]]]
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; CHECK: DS_READ_B32 [[PTR]]
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define void @local_address_gep_const_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %in) {
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entry:
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%0 = getelementptr i32 addrspace(3)* %in, i32 1
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%1 = load i32 addrspace(3)* %0
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store i32 %1, i32 addrspace(1)* %out
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ret void
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}
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