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5193e4ebe2
I was too pessimistic in r177105. Vector selects that fit into a legal register
type lower just fine. I was mislead by the code fragment that I was using. The
stores/loads that I saw in those cases came from lowering the conditional off
an address.
Changing the code fragment to:
%T0_3 = type <8 x i18>
%T1_3 = type <8 x i1>
define void @func_blend3(%T0_3* %loadaddr, %T0_3* %loadaddr2,
%T1_3* %blend, %T0_3* %storeaddr) {
%v0 = load %T0_3* %loadaddr
%v1 = load %T0_3* %loadaddr2
==> FROM:
;%c = load %T1_3* %blend
==> TO:
%c = icmp slt %T0_3 %v0, %v1
==> USE:
%r = select %T1_3 %c, %T0_3 %v0, %T0_3 %v1
store %T0_3 %r, %T0_3* %storeaddr
ret void
}
revealed this mistake.
radar://13403975
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177170 91177308-0d34-0410-b5e6-96231b3b80d8
124 lines
3.5 KiB
LLVM
124 lines
3.5 KiB
LLVM
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
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; Make sure that ARM backend with NEON handles vselect.
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define void @vmax_v4i32(<4 x i32>* %m, <4 x i32> %a, <4 x i32> %b) {
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; CHECK: vcgt.s32 [[QR:q[0-9]+]], [[Q1:q[0-9]+]], [[Q2:q[0-9]+]]
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; CHECK: vbsl [[QR]], [[Q1]], [[Q2]]
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%cmpres = icmp sgt <4 x i32> %a, %b
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%maxres = select <4 x i1> %cmpres, <4 x i32> %a, <4 x i32> %b
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store <4 x i32> %maxres, <4 x i32>* %m
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ret void
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}
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; We adjusted the cost model of the following selects. When we improve code
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; lowering we also need to adjust the cost.
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%T0_10 = type <16 x i16>
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%T1_10 = type <16 x i1>
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; CHECK: func_blend10:
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define void @func_blend10(%T0_10* %loadaddr, %T0_10* %loadaddr2,
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%T1_10* %blend, %T0_10* %storeaddr) {
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%v0 = load %T0_10* %loadaddr
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%v1 = load %T0_10* %loadaddr2
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%c = icmp slt %T0_10 %v0, %v1
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; CHECK: vst1
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; CHECK: vst1
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; CHECK: vst1
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; CHECK: vst1
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; CHECK: vld
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; COST: func_blend10
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; COST: cost of 40 {{.*}} select
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%r = select %T1_10 %c, %T0_10 %v0, %T0_10 %v1
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store %T0_10 %r, %T0_10* %storeaddr
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ret void
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}
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%T0_14 = type <8 x i32>
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%T1_14 = type <8 x i1>
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; CHECK: func_blend14:
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define void @func_blend14(%T0_14* %loadaddr, %T0_14* %loadaddr2,
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%T1_14* %blend, %T0_14* %storeaddr) {
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%v0 = load %T0_14* %loadaddr
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%v1 = load %T0_14* %loadaddr2
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%c = icmp slt %T0_14 %v0, %v1
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; COST: func_blend14
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; COST: cost of 41 {{.*}} select
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%r = select %T1_14 %c, %T0_14 %v0, %T0_14 %v1
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store %T0_14 %r, %T0_14* %storeaddr
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ret void
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}
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%T0_15 = type <16 x i32>
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%T1_15 = type <16 x i1>
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; CHECK: func_blend15:
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define void @func_blend15(%T0_15* %loadaddr, %T0_15* %loadaddr2,
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%T1_15* %blend, %T0_15* %storeaddr) {
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%v0 = load %T0_15* %loadaddr
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%v1 = load %T0_15* %loadaddr2
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%c = icmp slt %T0_15 %v0, %v1
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; COST: func_blend15
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; COST: cost of 82 {{.*}} select
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%r = select %T1_15 %c, %T0_15 %v0, %T0_15 %v1
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store %T0_15 %r, %T0_15* %storeaddr
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ret void
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}
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%T0_18 = type <4 x i64>
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%T1_18 = type <4 x i1>
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; CHECK: func_blend18:
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define void @func_blend18(%T0_18* %loadaddr, %T0_18* %loadaddr2,
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%T1_18* %blend, %T0_18* %storeaddr) {
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%v0 = load %T0_18* %loadaddr
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%v1 = load %T0_18* %loadaddr2
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%c = icmp slt %T0_18 %v0, %v1
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; CHECK: strh
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; CHECK: strh
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; CHECK: strh
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; CHECK: strh
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; COST: func_blend18
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; COST: cost of 19 {{.*}} select
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%r = select %T1_18 %c, %T0_18 %v0, %T0_18 %v1
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store %T0_18 %r, %T0_18* %storeaddr
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ret void
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}
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%T0_19 = type <8 x i64>
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%T1_19 = type <8 x i1>
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; CHECK: func_blend19:
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define void @func_blend19(%T0_19* %loadaddr, %T0_19* %loadaddr2,
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%T1_19* %blend, %T0_19* %storeaddr) {
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%v0 = load %T0_19* %loadaddr
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%v1 = load %T0_19* %loadaddr2
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%c = icmp slt %T0_19 %v0, %v1
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; COST: func_blend19
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; COST: cost of 50 {{.*}} select
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%r = select %T1_19 %c, %T0_19 %v0, %T0_19 %v1
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store %T0_19 %r, %T0_19* %storeaddr
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ret void
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}
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%T0_20 = type <16 x i64>
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%T1_20 = type <16 x i1>
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; CHECK: func_blend20:
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define void @func_blend20(%T0_20* %loadaddr, %T0_20* %loadaddr2,
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%T1_20* %blend, %T0_20* %storeaddr) {
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%v0 = load %T0_20* %loadaddr
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%v1 = load %T0_20* %loadaddr2
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%c = icmp slt %T0_20 %v0, %v1
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; CHECK: strb
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; COST: func_blend20
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; COST: cost of 100 {{.*}} select
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%r = select %T1_20 %c, %T0_20 %v0, %T0_20 %v1
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store %T0_20 %r, %T0_20* %storeaddr
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ret void
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}
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