Evan Cheng a2ee2756f7 Be smarter about which node to force schedule. Reduce # of duplications + copies; Added statistics. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42387 91177308-0d34-0410-b5e6-96231b3b80d8

2007-09-27 07:09:03 +00:00

..

CallingConvLower.cpp

propagate struct size and alignment of byval arguments to the DAG

2007-08-10 14:44:42 +00:00

DAGCombiner.cpp

Fix a bogus splat xform:

2007-09-18 21:54:37 +00:00

LegalizeDAG.cpp

Fix f80 UNDEF.

2007-09-26 17:26:49 +00:00

Makefile

For PR780:

2006-07-26 16:18:00 +00:00

ScheduleDAG.cpp

- Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.

2007-09-26 21:36:17 +00:00

ScheduleDAGList.cpp

Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.

2007-09-25 01:54:36 +00:00

ScheduleDAGRRList.cpp

Be smarter about which node to force schedule. Reduce # of duplications + copies; Added statistics.

2007-09-27 07:09:03 +00:00

ScheduleDAGSimple.cpp

Allow copyRegToReg to emit cross register classes copies.

2007-09-26 06:25:56 +00:00

SelectionDAG.cpp

Change APFloat::convertFromInteger to take the incoming

2007-09-21 22:09:37 +00:00

SelectionDAGISel.cpp

Enable codegen for long double abs, sin, cos

2007-09-26 21:10:55 +00:00

SelectionDAGPrinter.cpp

Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.

2007-09-25 01:54:36 +00:00

TargetLowering.cpp

Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and

2007-09-25 15:10:49 +00:00