mirror of
https://github.com/c64scene-ar/llvm-6502.git
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38c6b58eec
Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201333 91177308-0d34-0410-b5e6-96231b3b80d8
148 lines
5.5 KiB
LLVM
148 lines
5.5 KiB
LLVM
; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -no-integrated-as < %s | FileCheck %s
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@var_simple = hidden global i32 0
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@var_got = global i32 0
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@var_tlsgd = thread_local global i32 0
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@var_tlsld = thread_local(localdynamic) global i32 0
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@var_tlsie = thread_local(initialexec) global i32 0
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@var_tlsle = thread_local(localexec) global i32 0
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define void @test_inline_modifier_L() nounwind {
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; CHECK-LABEL: test_inline_modifier_L:
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_simple)
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call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_got)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsgd)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsld)
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call void asm sideeffect "ldr x0, [x0, ${0:L}]", "S,~{x0}"(i32* @var_tlsie)
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call void asm sideeffect "add x0, x0, ${0:L}", "S,~{x0}"(i32* @var_tlsle)
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; CHECK: add x0, x0, #:lo12:var_simple
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; CHECK: ldr x0, [x0, #:got_lo12:var_got]
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; CHECK: add x0, x0, #:tlsdesc_lo12:var_tlsgd
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; CHECK: add x0, x0, #:dtprel_lo12:var_tlsld
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; CHECK: ldr x0, [x0, #:gottprel_lo12:var_tlsie]
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; CHECK: add x0, x0, #:tprel_lo12:var_tlsle
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call void asm sideeffect "add x0, x0, ${0:L}", "Si,~{x0}"(i32 64)
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call void asm sideeffect "ldr x0, [x0, ${0:L}]", "Si,~{x0}"(i32 64)
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; CHECK: add x0, x0, #64
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; CHECK: ldr x0, [x0, #64]
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ret void
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}
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define void @test_inline_modifier_G() nounwind {
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; CHECK-LABEL: test_inline_modifier_G:
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call void asm sideeffect "add x0, x0, ${0:G}, lsl #12", "S,~{x0}"(i32* @var_tlsld)
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call void asm sideeffect "add x0, x0, ${0:G}, lsl #12", "S,~{x0}"(i32* @var_tlsle)
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; CHECK: add x0, x0, #:dtprel_hi12:var_tlsld, lsl #12
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; CHECK: add x0, x0, #:tprel_hi12:var_tlsle, lsl #12
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call void asm sideeffect "add x0, x0, ${0:G}", "Si,~{x0}"(i32 42)
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; CHECK: add x0, x0, #42
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ret void
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}
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define void @test_inline_modifier_A() nounwind {
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; CHECK-LABEL: test_inline_modifier_A:
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_simple)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_got)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_tlsgd)
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call void asm sideeffect "adrp x0, ${0:A}", "S,~{x0}"(i32* @var_tlsie)
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; N.b. All tprel and dtprel relocs are modified: lo12 or granules.
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; CHECK: adrp x0, var_simple
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; CHECK: adrp x0, :got:var_got
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; CHECK: adrp x0, :tlsdesc:var_tlsgd
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; CHECK: adrp x0, :gottprel:var_tlsie
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call void asm sideeffect "adrp x0, ${0:A}", "Si,~{x0}"(i32 40)
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; CHECK: adrp x0, #40
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ret void
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}
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define void @test_inline_modifier_wx(i32 %small, i64 %big) nounwind {
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; CHECK-LABEL: test_inline_modifier_wx:
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call i32 asm sideeffect "add $0, $0, $0", "=r,0"(i32 %small)
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call i32 asm sideeffect "add ${0:w}, ${0:w}, ${0:w}", "=r,0"(i32 %small)
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call i32 asm sideeffect "add ${0:x}, ${0:x}, ${0:x}", "=r,0"(i32 %small)
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; CHECK: //APP
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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call i64 asm sideeffect "add $0, $0, $0", "=r,0"(i64 %big)
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call i64 asm sideeffect "add ${0:w}, ${0:w}, ${0:w}", "=r,0"(i64 %big)
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call i64 asm sideeffect "add ${0:x}, ${0:x}, ${0:x}", "=r,0"(i64 %big)
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}
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call i32 asm sideeffect "add ${0:w}, ${1:w}, ${1:w}", "=r,r"(i32 0)
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call i32 asm sideeffect "add ${0:x}, ${1:x}, ${1:x}", "=r,r"(i32 0)
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; CHECK: add {{w[0-9]+}}, wzr, wzr
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; CHECK: add {{x[0-9]+}}, xzr, xzr
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call i32 asm sideeffect "add ${0:w}, ${0:w}, ${1:w}", "=r,Ir,0"(i32 123, i32 %small)
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call i64 asm sideeffect "add ${0:x}, ${0:x}, ${1:x}", "=r,Ir,0"(i32 456, i64 %big)
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; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, #123
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #456
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ret void
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}
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define void @test_inline_modifier_bhsdq() nounwind {
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; CHECK-LABEL: test_inline_modifier_bhsdq:
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call float asm sideeffect "ldr ${0:b}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:h}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:s}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:d}, [sp]", "=w"()
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call float asm sideeffect "ldr ${0:q}, [sp]", "=w"()
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; CHECK: ldr b0, [sp]
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; CHECK: ldr h0, [sp]
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; CHECK: ldr s0, [sp]
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; CHECK: ldr d0, [sp]
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; CHECK: ldr q0, [sp]
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call double asm sideeffect "ldr ${0:b}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:h}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:s}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:d}, [sp]", "=w"()
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call double asm sideeffect "ldr ${0:q}, [sp]", "=w"()
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; CHECK: ldr b0, [sp]
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; CHECK: ldr h0, [sp]
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; CHECK: ldr s0, [sp]
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; CHECK: ldr d0, [sp]
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; CHECK: ldr q0, [sp]
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call void asm sideeffect "fcmp b0, ${0:b}", "Yw"(float 0.0)
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call void asm sideeffect "fcmp h0, ${0:h}", "Yw"(float 0.0)
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call void asm sideeffect "fcmp s0, ${0:s}", "Yw"(float 0.0)
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call void asm sideeffect "fcmp d0, ${0:d}", "Yw"(float 0.0)
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call void asm sideeffect "fcmp q0, ${0:q}", "Yw"(float 0.0)
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; CHECK: fcmp b0, #0
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; CHECK: fcmp h0, #0
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; CHECK: fcmp s0, #0
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; CHECK: fcmp d0, #0
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; CHECK: fcmp q0, #0
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ret void
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}
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define void @test_inline_modifier_c() nounwind {
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; CHECK-LABEL: test_inline_modifier_c:
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call void asm sideeffect "adr x0, ${0:c}", "i"(i32 3)
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; CHECK: adr x0, 3
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ret void
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}
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define void @test_inline_modifier_a() nounwind {
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; CHECK-LABEL: test_inline_modifier_a:
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call void asm sideeffect "prfm pldl1keep, ${0:a}", "r"(i32* @var_simple)
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; CHECK: adrp [[VARHI:x[0-9]+]], var_simple
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; CHECK: add x[[VARADDR:[0-9]+]], [[VARHI]], #:lo12:var_simple
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; CHECK: prfm pldl1keep, [x[[VARADDR]]]
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ret void
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}
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