llvm-6502/utils/TableGen
Johnny Chen 1808e4d251 If all the bit positions are not specified; do not decode the instructions.
We are bound to fail!  For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.

This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-09 21:01:02 +00:00
..
ARMDecoderEmitter.cpp If all the bit positions are not specified; do not decode the instructions. 2010-04-09 21:01:02 +00:00
ARMDecoderEmitter.h Change from .../Support/DataTypes.h to .../System/DataTypes.h. 2010-04-02 22:41:06 +00:00
AsmMatcherEmitter.cpp
AsmMatcherEmitter.h
AsmWriterEmitter.cpp change a ton of code to not implicitly use the "O" raw_ostream 2010-04-04 04:47:45 +00:00
AsmWriterEmitter.h
AsmWriterInst.cpp change a ton of code to not implicitly use the "O" raw_ostream 2010-04-04 04:47:45 +00:00
AsmWriterInst.h
CallingConvEmitter.cpp
CallingConvEmitter.h
ClangDiagnosticsEmitter.cpp
ClangDiagnosticsEmitter.h
CMakeLists.txt Add the new ARMDecodeEmitter to CMake build. 2010-04-03 04:36:43 +00:00
CodeEmitterGen.cpp rename llvm::llvm_report_error -> llvm::report_fatal_error 2010-04-07 22:58:41 +00:00
CodeEmitterGen.h
CodeGenDAGPatterns.cpp print the complexity of the pattern being matched in the 2010-03-29 01:40:38 +00:00
CodeGenDAGPatterns.h print the complexity of the pattern being matched in the 2010-03-29 01:40:38 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenRegisters.h
CodeGenTarget.cpp
CodeGenTarget.h
DAGISelEmitter.cpp Switch pattern sorting predicate from stable sort -> sort, it 2010-03-29 02:02:45 +00:00
DAGISelEmitter.h
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp print the complexity of the pattern being matched in the 2010-03-29 01:40:38 +00:00
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DisassemblerEmitter.cpp Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen 2010-04-02 22:27:38 +00:00
DisassemblerEmitter.h
EDEmitter.cpp Use errs instead of fprintf. 2010-04-08 09:42:29 +00:00
EDEmitter.h
FastISelEmitter.cpp
FastISelEmitter.h
InstrEnumEmitter.cpp
InstrEnumEmitter.h
InstrInfoEmitter.cpp Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
InstrInfoEmitter.h Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
IntrinsicEmitter.cpp
IntrinsicEmitter.h
LLVMCConfigurationEmitter.cpp
LLVMCConfigurationEmitter.h
Makefile
OptParserEmitter.cpp
OptParserEmitter.h
Record.cpp Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 2010-04-05 03:10:20 +00:00
Record.h If all the bit positions are not specified; do not decode the instructions. 2010-04-09 21:01:02 +00:00
RegisterInfoEmitter.cpp
RegisterInfoEmitter.h
StringToOffsetTable.h
SubtargetEmitter.cpp Initial support for different kinds of FU reservation. 2010-04-07 18:19:32 +00:00
SubtargetEmitter.h
TableGen.cpp Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen 2010-04-02 22:27:38 +00:00
TableGenBackend.cpp
TableGenBackend.h
TGLexer.cpp
TGLexer.h
TGParser.cpp
TGParser.h
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.h
X86RecognizableInstr.cpp Fixed a bug where the disassembler would allow an immediate 2010-04-07 21:42:19 +00:00
X86RecognizableInstr.h