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https://github.com/c64scene-ar/llvm-6502.git
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a347f85dbe
target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
2.0 KiB
C++
65 lines
2.0 KiB
C++
//===- PTXRegisterInfo.h - PTX Register Information Impl --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the PTX implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PTX_REGISTER_INFO_H
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#define PTX_REGISTER_INFO_H
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/ADT/BitVector.h"
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#include "PTXGenRegisterInfo.h.inc"
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namespace llvm {
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class PTXTargetMachine;
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class MachineFunction;
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struct PTXRegisterInfo : public PTXGenRegisterInfo {
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PTXRegisterInfo(PTXTargetMachine &TM,
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const TargetInstrInfo &TII);
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virtual const unsigned
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*getCalleeSavedRegs(const MachineFunction *MF = 0) const {
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static const unsigned CalleeSavedRegs[] = { 0 };
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return CalleeSavedRegs; // save nothing
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}
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virtual BitVector getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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return Reserved; // reserve no regs
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}
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virtual void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj,
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RegScavenger *RS = NULL) const;
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virtual unsigned getFrameRegister(const MachineFunction &MF) const {
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llvm_unreachable("PTX does not have a frame register");
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return 0;
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}
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virtual unsigned getRARegister() const {
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llvm_unreachable("PTX does not have a return address register");
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return 0;
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}
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virtual int getDwarfRegNum(unsigned RegNum, bool isEH) const {
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return PTXGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
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}
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virtual int getLLVMRegNum(unsigned RegNum, bool isEH) const {
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return PTXGenRegisterInfo::getLLVMRegNumFull(RegNum, 0);
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}
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}; // struct PTXRegisterInfo
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} // namespace llvm
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#endif // PTX_REGISTER_INFO_H
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