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https://github.com/c64scene-ar/llvm-6502.git
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8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
1.5 KiB
LLVM
70 lines
1.5 KiB
LLVM
; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=TRAP
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; RUN: llc -march=mips -mno-check-zero-division < %s |\
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; RUN: FileCheck %s -check-prefix=NOCHECK
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; TRAP-LABEL: sdiv1:
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; TRAP: div $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
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; TRAP: teq $[[R0]], $zero, 7
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; TRAP: mflo
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; NOCHECK-LABEL: sdiv1:
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; NOCHECK-NOT: teq
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; NOCHECK: .end sdiv1
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define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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%div = sdiv i32 %a0, %a1
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ret i32 %div
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}
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; TRAP-LABEL: srem1:
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; TRAP: div $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
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; TRAP: teq $[[R0]], $zero, 7
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; TRAP: mfhi
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define i32 @srem1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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%rem = srem i32 %a0, %a1
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ret i32 %rem
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}
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; TRAP-LABEL: udiv1:
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; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
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; TRAP: teq $[[R0]], $zero, 7
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; TRAP: mflo
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define i32 @udiv1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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%div = udiv i32 %a0, %a1
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ret i32 %div
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}
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; TRAP-LABEL: urem1:
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; TRAP: divu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
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; TRAP: teq $[[R0]], $zero, 7
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; TRAP: mfhi
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define i32 @urem1(i32 %a0, i32 %a1) nounwind readnone {
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entry:
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%rem = urem i32 %a0, %a1
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ret i32 %rem
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}
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; TRAP: div $zero,
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define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
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entry:
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%rem = srem i32 %a0, %a1
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store i32 %rem, i32* %r, align 4
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%div = sdiv i32 %a0, %a1
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ret i32 %div
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}
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; TRAP: divu $zero,
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define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind {
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entry:
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%rem = urem i32 %a0, %a1
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store i32 %rem, i32* %r, align 4
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%div = udiv i32 %a0, %a1
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ret i32 %div
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}
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