Daniel Sanders a39d3ab819 [mips][mips64r6] Correct the encoding of dmuh, dmuhu, dmul, and dmulu. ... We have detected a documentation bug in the encoding tables of the released MIPS64r6 specification that has resulted in the wrong encodings being used for these instructions in LLVM. This commit corrects them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212330 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-04 10:08:27 +00:00
..
AArch64	aarch64: support target-specific .req assembler directive	2014-07-02 04:50:23 +00:00
ARM	ARM: take care not to set the ThumbFunc bit on TLS data symbols	2014-06-30 09:37:24 +00:00
AsmParser
COFF	Fix .seh_stackalloc 0	2014-07-01 00:42:47 +00:00
Disassembler	[mips][mips64r6] Correct the encoding of dmuh, dmuhu, dmul, and dmulu.	2014-07-04 10:08:27 +00:00
ELF	Avoid revocations when possible.	2014-07-01 14:34:30 +00:00
MachO
Markup
Mips	[mips][mips64r6] Correct the encoding of dmuh, dmuhu, dmul, and dmulu.	2014-07-04 10:08:27 +00:00
PowerPC
Sparc
SystemZ
X86	[X86] Limit maximum nop length on Silvermont	2014-07-04 07:14:56 +00:00