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9994b911f4
This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242727 91177308-0d34-0410-b5e6-96231b3b80d8
81 lines
2.9 KiB
C++
81 lines
2.9 KiB
C++
//===-- MipsRegisterInfo.h - Mips Register Information Impl -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mips implementation of the TargetRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
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#include "Mips.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "MipsGenRegisterInfo.inc"
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namespace llvm {
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class MipsRegisterInfo : public MipsGenRegisterInfo {
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public:
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MipsRegisterInfo();
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// Mips::RA, return the number that it corresponds to (e.g. 31).
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static unsigned getRegisterNumbering(unsigned RegEnum);
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/// Get PIC indirect call register
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static unsigned getPICCallReg();
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/// Adjust the Mips stack frame.
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void adjustMipsStackFrame(MachineFunction &MF) const;
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/// Code Generation virtual methods...
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const TargetRegisterClass *getPointerRegClass(const MachineFunction &MF,
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unsigned Kind) const override;
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const override;
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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const uint32_t *getCallPreservedMask(const MachineFunction &MF,
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CallingConv::ID) const override;
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static const uint32_t *getMips16RetHelperMask();
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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bool requiresRegisterScavenging(const MachineFunction &MF) const override;
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
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/// Stack Frame Processing Methods
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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void processFunctionBeforeFrameFinalized(MachineFunction &MF,
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RegScavenger *RS = nullptr) const;
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// Stack realignment queries.
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bool canRealignStack(const MachineFunction &MF) const override;
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/// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const override;
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/// \brief Return GPR register class.
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virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
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private:
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virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
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int FrameIndex, uint64_t StackSize,
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int64_t SPOffset) const = 0;
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};
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} // end namespace llvm
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#endif
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