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https://github.com/c64scene-ar/llvm-6502.git
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c8bfd1d78f
flags. They are still not enable in this revision. Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with the scheduler's model of operand latency in the selection DAG. Generalized unit tests to work with sched-cycles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
919 B
LLVM
30 lines
919 B
LLVM
; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=GENERIC
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; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6
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; RUN: llc < %s -mtriple=armv6-apple-darwin -arm-strict-align | FileCheck %s -check-prefix=GENERIC
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; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC
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; rdar://7113725
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define void @t(i8* nocapture %a, i8* nocapture %b) nounwind {
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entry:
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; GENERIC: t:
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; GENERIC: ldrb r2
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; GENERIC: ldrb r3
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; GENERIC: ldrb r12
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; GENERIC: ldrb r1
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; GENERIC: strb r1
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; GENERIC: strb r12
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; GENERIC: strb r3
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; GENERIC: strb r2
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; DARWIN_V6: t:
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; DARWIN_V6: ldr r1
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; DARWIN_V6: str r1
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%__src1.i = bitcast i8* %b to i32* ; <i32*> [#uses=1]
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%__dest2.i = bitcast i8* %a to i32* ; <i32*> [#uses=1]
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%tmp.i = load i32* %__src1.i, align 1 ; <i32> [#uses=1]
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store i32 %tmp.i, i32* %__dest2.i, align 1
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ret void
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}
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