llvm-6502/test/Analysis/CostModel/ARM
Renato Golin 5ad5f5931e Improve long vector sext/zext lowering on ARM
The ARM backend currently has poor codegen for long sext/zext
operations, such as v8i8 -> v8i32. This patch addresses this
by performing a custom expansion in ARMISelLowering. It also
adds/changes the cost of such lowering in ARMTTI.

This partially addresses PR14867.

Patch by Pete Couperus

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177380 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-19 08:15:38 +00:00
..
cast.ll Improve long vector sext/zext lowering on ARM 2013-03-19 08:15:38 +00:00
gep.ll ARM cost model: Address computation in vector mem ops not free 2013-02-08 14:50:48 +00:00
insertelement.ll ARM cost model: Address computation in vector mem ops not free 2013-02-08 14:50:48 +00:00
lit.local.cfg
select.ll ARM cost model: Fix costs for some vector selects 2013-03-15 18:31:01 +00:00
shuffle.ll ARM cost model: Add vector reverse shuffle costs 2013-02-12 02:40:39 +00:00