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c37cb66e6e
When trying to collapse sequences of insertelement/extractelement instructions into single shuffle instructions, there is one specific case where the Instruction Combiner wrongly updates the resulting Mask of shuffle indexes. The problem is in function CollectShuffleElments. If we have a sequence of insert/extract element instructions like the one below: %tmp1 = extractelement <4 x float> %LHS, i32 0 %tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1 %tmp3 = extractelement <4 x float> %RHS, i32 2 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3 Where: . %RHS will have a mask of [4,5,6,7] . %LHS will have a mask of [0,1,2,3] The Mask of shuffle indexes is wrongly computed to [4,1,6,7] instead of [4,0,6,7]. When analyzing %tmp2 in order to compute the Mask for the resulting shuffle instruction, the algorithm forgets to update the mask index at position 1 with the index associated to the element extracted from %LHS by instruction %tmp1. Patch by Andrea DiBiagio! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179291 91177308-0d34-0410-b5e6-96231b3b80d8
226 lines
9.4 KiB
LLVM
226 lines
9.4 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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define <4 x float> @test1(<4 x float> %v1) {
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; CHECK: @test1
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; CHECK: ret <4 x float> %v1
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%v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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ret <4 x float> %v2
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}
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define <4 x float> @test2(<4 x float> %v1) {
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; CHECK: @test2
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; CHECK: ret <4 x float> %v1
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%v2 = shufflevector <4 x float> %v1, <4 x float> %v1, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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ret <4 x float> %v2
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}
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define float @test3(<4 x float> %A, <4 x float> %B, float %f) {
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; CHECK: @test3
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; CHECK: ret float %f
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%C = insertelement <4 x float> %A, float %f, i32 0
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%D = shufflevector <4 x float> %C, <4 x float> %B, <4 x i32> <i32 5, i32 0, i32 2, i32 7>
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%E = extractelement <4 x float> %D, i32 1
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ret float %E
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}
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define i32 @test4(<4 x i32> %X) {
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; CHECK: @test4
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define i32 @test5(<4 x i32> %X) {
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; CHECK: @test5
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%tmp152.i53899.i = shufflevector <4 x i32> %X, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 undef, i32 undef>
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%tmp34 = extractelement <4 x i32> %tmp152.i53899.i, i32 0
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ret i32 %tmp34
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}
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define float @test6(<4 x float> %X) {
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; CHECK: @test6
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; CHECK-NEXT: extractelement
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; CHECK-NEXT: ret
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%X1 = bitcast <4 x float> %X to <4 x i32>
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%tmp152.i53899.i = shufflevector <4 x i32> %X1, <4 x i32> undef, <4 x i32> zeroinitializer
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%tmp152.i53900.i = bitcast <4 x i32> %tmp152.i53899.i to <4 x float>
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%tmp34 = extractelement <4 x float> %tmp152.i53900.i, i32 0
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ret float %tmp34
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}
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define <4 x float> @test7(<4 x float> %tmp45.i) {
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; CHECK: @test7
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; CHECK-NEXT: ret <4 x float> %tmp45.i
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%tmp1642.i = shufflevector <4 x float> %tmp45.i, <4 x float> undef, <4 x i32> < i32 0, i32 1, i32 6, i32 7 >
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ret <4 x float> %tmp1642.i
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}
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; This should turn into a single shuffle.
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define <4 x float> @test8(<4 x float> %tmp, <4 x float> %tmp1) {
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; CHECK: @test8
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp4 = extractelement <4 x float> %tmp, i32 1
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%tmp2 = extractelement <4 x float> %tmp, i32 3
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%tmp1.upgrd.1 = extractelement <4 x float> %tmp1, i32 0
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%tmp128 = insertelement <4 x float> undef, float %tmp4, i32 0
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%tmp130 = insertelement <4 x float> %tmp128, float undef, i32 1
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%tmp132 = insertelement <4 x float> %tmp130, float %tmp2, i32 2
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%tmp134 = insertelement <4 x float> %tmp132, float %tmp1.upgrd.1, i32 3
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ret <4 x float> %tmp134
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}
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; Test fold of two shuffles where the first shuffle vectors inputs are a
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; different length then the second.
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define <4 x i8> @test9(<16 x i8> %tmp6) nounwind {
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; CHECK: @test9
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 13, i32 9, i32 4, i32 13 > ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Same as test9, but make sure that "undef" mask values are not confused with
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; mask values of 2*N, where N is the mask length. These shuffles should not
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; be folded (because [8,9,4,8] may not be a mask supported by the target).
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define <4 x i8> @test9a(<16 x i8> %tmp6) nounwind {
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; CHECK: @test9a
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> < i32 undef, i32 9, i32 4, i32 8 > ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Test fold of two shuffles where the first shuffle vectors inputs are a
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; different length then the second.
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define <4 x i8> @test9b(<4 x i8> %tmp6, <4 x i8> %tmp7) nounwind {
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; CHECK: @test9
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <4 x i8> %tmp6, <4 x i8> %tmp7, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3> ; <<4 x i8>> [#uses=1]
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%tmp9 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 4, i32 5> ; <<4 x i8>> [#uses=1]
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ret <4 x i8> %tmp9
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}
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; Redundant vector splats should be removed. Radar 8597790.
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define <4 x i32> @test10(<4 x i32> %tmp5) nounwind {
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; CHECK: @test10
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; CHECK-NEXT: shufflevector
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; CHECK-NEXT: ret
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%tmp6 = shufflevector <4 x i32> %tmp5, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
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%tmp7 = shufflevector <4 x i32> %tmp6, <4 x i32> undef, <4 x i32> zeroinitializer
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ret <4 x i32> %tmp7
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}
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; Test fold of two shuffles where the two shufflevector inputs's op1 are
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; the same
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define <8 x i8> @test11(<16 x i8> %tmp6) nounwind {
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; CHECK: @test11
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; CHECK-NEXT: shufflevector <16 x i8> %tmp6, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x i8>> [#uses=1]
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%tmp2 = shufflevector <16 x i8> %tmp6, <16 x i8> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7> ; <<4 x i8>> [#uses=1]
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%tmp3 = shufflevector <4 x i8> %tmp1, <4 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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; Test fold of two shuffles where the first shufflevector's inputs are
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; the same as the second
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define <8 x i8> @test12(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
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; CHECK: @test12
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; CHECK-NEXT: shufflevector <8 x i8> %tmp6, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 8, i32 11, i32 12>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 undef, i32 7> ; <<8 x i8>> [#uses=1]
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%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 9, i32 8, i32 11, i32 12> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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; Test fold of two shuffles where the first shufflevector's inputs are
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; the same as the second
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define <8 x i8> @test12a(<8 x i8> %tmp6, <8 x i8> %tmp2) nounwind {
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; CHECK: @test12a
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; CHECK-NEXT: shufflevector <8 x i8> %tmp2, <8 x i8> %tmp6, <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, i32 9, i32 10, i32 11>
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; CHECK-NEXT: ret
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%tmp1 = shufflevector <8 x i8> %tmp6, <8 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 5, i32 4, i32 undef, i32 7> ; <<8 x i8>> [#uses=1]
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%tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> %tmp1, <8 x i32> <i32 0, i32 3, i32 1, i32 4, i32 8, i32 9, i32 10, i32 11> ; <<8 x i8>> [#uses=1]
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ret <8 x i8> %tmp3
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}
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; We should form a shuffle out of a select with constant condition.
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define <4 x i16> @test13a(<4 x i16> %lhs, <4 x i16> %rhs) {
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; CHECK: @test13a
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; CHECK-NEXT: shufflevector <4 x i16> %lhs, <4 x i16> %rhs, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
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; CHECK-NEXT: ret
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%A = select <4 x i1> <i1 true, i1 false, i1 true, i1 false>,
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<4 x i16> %lhs, <4 x i16> %rhs
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ret <4 x i16> %A
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}
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define <4 x i16> @test13b(<4 x i16> %lhs, <4 x i16> %rhs) {
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; CHECK: @test13b
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; CHECK-NEXT: ret <4 x i16> %lhs
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%A = select <4 x i1> <i1 true, i1 undef, i1 true, i1 true>,
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<4 x i16> %lhs, <4 x i16> %rhs
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ret <4 x i16> %A
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}
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define <4 x i16> @test13c(<4 x i16> %lhs, <4 x i16> %rhs) {
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; CHECK: @test13c
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; CHECK-NEXT: shufflevector <4 x i16> %lhs, <4 x i16> %rhs, <4 x i32> <i32 0, i32 undef, i32 2, i32 7>
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; CHECK-NEXT: ret
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%A = select <4 x i1> <i1 true, i1 undef, i1 true, i1 false>,
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<4 x i16> %lhs, <4 x i16> %rhs
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ret <4 x i16> %A
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}
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define <4 x i16> @test13d(<4 x i16> %lhs, <4 x i16> %rhs) {
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; CHECK: @test13d
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; CHECK: select
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; CHECK-NEXT: ret
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%A = select <4 x i1> <i1 true, i1 icmp ugt (<4 x i16>(<4 x i16>, <4 x i16>)* @test13a, <4 x i16>(<4 x i16>, <4 x i16>)* @test13b), i1 true, i1 false>,
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<4 x i16> %lhs, <4 x i16> %rhs
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ret <4 x i16> %A
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}
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define <4 x i16> @test13e(<4 x i16> %lhs, <4 x i16> %rhs) {
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; CHECK: @test13e
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; CHECK-NEXT: ret <4 x i16> %rhs
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%A = select <4 x i1> <i1 false, i1 false, i1 false, i1 false>,
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<4 x i16> %lhs, <4 x i16> %rhs
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ret <4 x i16> %A
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}
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; Check that sequences of insert/extract element are
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; collapsed into shuffle instruction with correct shuffle indexes.
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define <4 x float> @test14a(<4 x float> %LHS, <4 x float> %RHS) {
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; CHECK: @test14a
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; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 0, i32 6, i32 6>
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; CHECK-NEXT: ret <4 x float> %tmp4
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%tmp1 = extractelement <4 x float> %LHS, i32 0
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%tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1
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%tmp3 = extractelement <4 x float> %RHS, i32 2
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%tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3
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ret <4 x float> %tmp4
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}
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define <4 x float> @test14b(<4 x float> %LHS, <4 x float> %RHS) {
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; CHECK: @test14b
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; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 3, i32 6, i32 6>
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; CHECK-NEXT: ret <4 x float> %tmp5
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%tmp0 = extractelement <4 x float> %LHS, i32 3
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%tmp1 = insertelement <4 x float> %RHS, float %tmp0, i32 0
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%tmp2 = extractelement <4 x float> %tmp1, i32 0
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%tmp3 = insertelement <4 x float> %RHS, float %tmp2, i32 1
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%tmp4 = extractelement <4 x float> %RHS, i32 2
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%tmp5 = insertelement <4 x float> %tmp3, float %tmp4, i32 3
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ret <4 x float> %tmp5
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}
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