mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-03 15:29:28 +00:00
15983b80a0
Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions, it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg") and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is smaller and partial register updates can sometimes be avoided. Until recently, this sequence was a barrier to rematerialization though. That should now be fixed so it's an appropriate time to make the change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182928 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
846 B
LLVM
42 lines
846 B
LLVM
; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
|
|
|
|
define i64 @test_sdiv64(i64 %dividend, i64 %divisor) nounwind {
|
|
entry:
|
|
%result = sdiv i64 %dividend, %divisor
|
|
ret i64 %result
|
|
}
|
|
|
|
; CHECK: test_sdiv64:
|
|
; CHECK: cqto
|
|
; CHECK: idivq
|
|
|
|
define i64 @test_srem64(i64 %dividend, i64 %divisor) nounwind {
|
|
entry:
|
|
%result = srem i64 %dividend, %divisor
|
|
ret i64 %result
|
|
}
|
|
|
|
; CHECK: test_srem64:
|
|
; CHECK: cqto
|
|
; CHECK: idivq
|
|
|
|
define i64 @test_udiv64(i64 %dividend, i64 %divisor) nounwind {
|
|
entry:
|
|
%result = udiv i64 %dividend, %divisor
|
|
ret i64 %result
|
|
}
|
|
|
|
; CHECK: test_udiv64:
|
|
; CHECK: xorl
|
|
; CHECK: divq
|
|
|
|
define i64 @test_urem64(i64 %dividend, i64 %divisor) nounwind {
|
|
entry:
|
|
%result = urem i64 %dividend, %divisor
|
|
ret i64 %result
|
|
}
|
|
|
|
; CHECK: test_urem64:
|
|
; CHECK: xorl
|
|
; CHECK: divq
|