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15983b80a0
Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions, it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg") and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is smaller and partial register updates can sometimes be avoided. Until recently, this sequence was a barrier to rematerialization though. That should now be fixed so it's an appropriate time to make the change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182928 91177308-0d34-0410-b5e6-96231b3b80d8
29 lines
624 B
LLVM
29 lines
624 B
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
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; Common "xorb al, al" instruction in the two successor blocks should be
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; moved to the entry block above the test + je.
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; rdar://9145558
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define zeroext i1 @t(i32 %c) nounwind ssp {
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entry:
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; CHECK: t:
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; CHECK: xorl %eax, %eax
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; CHECK: test
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; CHECK: je
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%tobool = icmp eq i32 %c, 0
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br i1 %tobool, label %return, label %if.then
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if.then:
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; CHECK: callq
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%call = tail call zeroext i1 (...)* @foo() nounwind
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br label %return
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return:
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; CHECK: ret
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%retval.0 = phi i1 [ %call, %if.then ], [ false, %entry ]
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ret i1 %retval.0
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}
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declare zeroext i1 @foo(...)
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