llvm-6502/lib/Target/IA64
..
IA64.h
IA64.td
IA64AsmPrinter.cpp
IA64InstrBuilder.h
IA64InstrFormats.td
IA64InstrInfo.cpp
IA64InstrInfo.h
IA64InstrInfo.td
IA64ISelPattern.cpp Add a pass name for -time-passes output 2005-08-22 18:28:09 +00:00
IA64MachineFunctionInfo.h
IA64RegisterInfo.cpp
IA64RegisterInfo.h
IA64RegisterInfo.td
IA64TargetMachine.cpp
IA64TargetMachine.h
Makefile
README

*** README for the LLVM IA64 Backend "Version 0.01" - March 18, 2005
*** Quote for this version:

      "Kaori and Hitomi are naughty!!"


Congratulations, you have found:

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* Bow down, bow down, before the power of IA64! Or be crushed, *
* be crushed, by its jolly registers of doom!!                 *
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DEVELOPMENT PLAN:

   _  you are       2005           maybe 2005       2006            2006 and
  /   here            |               |              |               beyond 
 v                    v               v              v                |
                                                                      v
CLEAN UP        ADD INSTRUCTION      ADD          PLAY WITH
INSTRUCTION --> SCHEDULING AND  -->  JIT    -->    DYNAMIC     --> FUTURE WORK
SELECTION       BUNDLING            SUPPORT     REOPTIMIZATION

DISCLAIMER AND PROMISE:

As of the time of this release, you are probably better off using Intel C/C++
or GCC. The performance of the code emitted right now is, in a word,
terrible. Check back in a few months - the story will be different then,
I guarantee it.

TODO:

  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (yep)
  - write truly inspirational documentation
  - if-conversion (predicate database/knowledge? etc etc)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:

  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:

  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:

  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:

  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.