llvm-6502/lib/CodeGen/SelectionDAG
Chris Lattner a4176525cc Reduce the number of copies emitted as machine instructions by
generating results in vregs that will need them.  In the case of something
like this:  CopyToReg((add X, Y), reg1024), we no longer emit code like
this:

   reg1025 = add X, Y
   reg1024 = reg 1025

Instead, we emit:

   reg1024 = add X, Y

Whoa! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24111 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-30 18:54:27 +00:00
..
DAGCombiner.cpp Codegen mul by negative power of two with a shift and negate. 2005-10-30 06:41:49 +00:00
LegalizeDAG.cpp Allow custom lowered FP_TO_SINT ops in the check for whether a larger 2005-10-25 23:47:25 +00:00
Makefile Change Library Names Not To Conflict With Others When Installed 2004-10-27 23:18:45 +00:00
ScheduleDAG.cpp Reduce the number of copies emitted as machine instructions by 2005-10-30 18:54:27 +00:00
SelectionDAG.cpp add TargetExternalSymbol 2005-10-23 03:40:17 +00:00
SelectionDAGISel.cpp Add the ability to lower return instructions to TargetLowering. This 2005-10-18 23:23:37 +00:00
SelectionDAGPrinter.cpp add a method 2005-10-01 00:17:07 +00:00
TargetLowering.cpp Invert the TargetLowering flag that controls divide by consant expansion. 2005-10-21 00:02:42 +00:00