mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-28 04:29:44 +00:00
38d5e1c36d
Using REG_SEQUENCE for BUILD_VECTOR rather than a series of INSERT_SUBREG
instructions should make it easier for the register allocator to coalasce
unnecessary copies.
v2:
- Use an SGPR register class if all the operands of BUILD_VECTOR are
SGPRs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188427 91177308-0d34-0410-b5e6-96231b3b80d8
53 lines
1.5 KiB
C++
53 lines
1.5 KiB
C++
//===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
/// \file
|
|
/// \brief Interface definition for R600RegisterInfo
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef R600REGISTERINFO_H_
|
|
#define R600REGISTERINFO_H_
|
|
|
|
#include "AMDGPURegisterInfo.h"
|
|
#include "AMDGPUTargetMachine.h"
|
|
|
|
namespace llvm {
|
|
|
|
class R600TargetMachine;
|
|
|
|
struct R600RegisterInfo : public AMDGPURegisterInfo {
|
|
AMDGPUTargetMachine &TM;
|
|
RegClassWeight RCW;
|
|
|
|
R600RegisterInfo(AMDGPUTargetMachine &tm);
|
|
|
|
virtual BitVector getReservedRegs(const MachineFunction &MF) const;
|
|
|
|
/// \param RC is an AMDIL reg class.
|
|
///
|
|
/// \returns the R600 reg class that is equivalent to \p RC.
|
|
virtual const TargetRegisterClass *getISARegClass(
|
|
const TargetRegisterClass *RC) const;
|
|
|
|
/// \brief get the HW encoding for a register's channel.
|
|
unsigned getHWRegChan(unsigned reg) const;
|
|
|
|
/// \brief get the register class of the specified type to use in the
|
|
/// CFGStructurizer
|
|
virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
|
|
|
|
virtual const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const;
|
|
|
|
};
|
|
|
|
} // End namespace llvm
|
|
|
|
#endif // AMDIDSAREGISTERINFO_H_
|