llvm-6502/test/CodeGen
2013-03-28 21:30:04 +00:00
..
AArch64 Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings 2013-03-26 18:56:54 +00:00
ARM Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
CPP
Generic XFAIL some of the generic CodeGen tests for Hexagon. 2013-03-25 21:04:16 +00:00
Hexagon Hexagon: Enable SupportDebugInfomation and DwarfInSection flags. 2013-03-28 19:34:49 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze
Mips
MSP430
NVPTX [NVPTX] Fix handling of vector arguments 2013-03-24 21:17:47 +00:00
PowerPC Specify CPUs on the PPC bswap-load-store test 2013-03-28 20:35:18 +00:00
R600 R600/SI: add SETO/SETUO patterns 2013-03-27 15:27:31 +00:00
SI
SPARC
Thumb Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
Thumb2
X86 Make Win32 put the SRet address into EAX, fixes PR15556 2013-03-28 21:30:04 +00:00
XCore