mirror of
https://github.com/c64scene-ar/llvm-6502.git
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d4addbe78a
Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175138 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
2.8 KiB
LLVM
72 lines
2.8 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
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;CHECK: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE_C
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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;CHECK-NEXT: S_WAITCNT 1792
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;CHECK-NEXT: IMAGE_SAMPLE
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define void @test() {
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%res1 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 1)
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%res2 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 2)
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%res3 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 3)
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%res4 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 4)
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%res5 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 5)
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%res6 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 6)
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%res7 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 7)
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%res8 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 8)
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%res9 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 9)
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%res10 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 10)
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%res11 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 11)
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%res12 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 12)
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%res13 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 13)
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%res14 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 14)
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%res15 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 15)
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%res16 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef,
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<8 x i32> undef, <4 x i32> undef, i32 16)
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ret void
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}
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declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32)
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