mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-12 13:30:51 +00:00
5c025f2f6e
Added support for bytes replication feature, so it could be GAS compatible.
E.g. instructions below:
"vmov.i32 d0, 0xffffffff"
"vmvn.i32 d0, 0xabababab"
"vmov.i32 d0, 0xabababab"
"vmov.i16 d0, 0xabab"
are incorrect, but we could deal with such cases.
For first one we should emit:
"vmov.i8 d0, 0xff"
For second one ("vmvn"):
"vmov.i8 d0, 0x54"
For last two instructions it should emit:
"vmov.i8 d0, 0xab"
P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code.
Just for keeping method bodies in harmony with themselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207080 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.6 KiB
ArmAsm
43 lines
1.6 KiB
ArmAsm
@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s
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.text
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i32 d2, #0xffffffff
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i32 q2, #0xffffffff
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i32 d2, #0xabababab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i32 q2, #0xabababab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i16 q2, #0xabab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vorr.i16 q2, #0xabab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i32 d2, #0xffffffff
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i32 q2, #0xffffffff
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i32 d2, #0xabababab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i32 q2, #0xabababab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i16 d2, #0xabab
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@ CHECK: error: invalid operand for instruction
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@ CHECK: vbic.i16 q2, #0xabab
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vorr.i32 d2, #0xffffffff
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vorr.i32 q2, #0xffffffff
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vorr.i32 d2, #0xabababab
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vorr.i32 q2, #0xabababab
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vorr.i16 q2, #0xabab
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vorr.i16 q2, #0xabab
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vbic.i32 d2, #0xffffffff
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vbic.i32 q2, #0xffffffff
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vbic.i32 d2, #0xabababab
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vbic.i32 q2, #0xabababab
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vbic.i16 d2, #0xabab
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vbic.i16 q2, #0xabab
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