llvm-6502/test/TableGen/math.td
Adam Nemet 30cced119b [TableGen] Allow shift operators to take bits<n>
Convert the operand to int if possible, i.e. if the value is properly
initialized.  (I suppose there is further room for improvement here to also
peform the shift if the uninitialized bits are shifted out.)

With this little change we can now compute the scaling factor for compressed
displacement with pure tablegen code in the X86 backend.  This is useful
because both the X86-disassembler-specific part of tablegen and the assembler
need this and TD is the natural sharing place.

The patch also adds the missing documentation for the shift and add operator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-17 17:04:27 +00:00

30 lines
539 B
TableGen

// RUN: llvm-tblgen %s | FileCheck %s
// XFAIL: vg_leak
def shifts {
bits<2> b = 0b10;
int i = 2;
int shifted_b = !shl(b, 2);
int shifted_i = !shl(i, 2);
}
// CHECK: def shifts
// CHECK: shifted_b = 8
// CHECK: shifted_i = 8
class Int<int value> {
int Value = value;
}
def v1024 : Int<1024>;
// CHECK: def v1024
// CHECK: Value = 1024
def v1025 : Int<!add(v1024.Value, 1)>;
// CHECK: def v1025
// CHECK: Value = 1025
def v2048 : Int<!add(v1024.Value, v1024.Value)>;
// CHECK: def v2048
// CHECK: Value = 2048